Full transaction-method graph

flowchart TB subgraph TransactronContextElaboratable["TransactronContextElaboratable"] subgraph CoreTestElaboratable["elaboratable CoreTestElaboratable"] subgraph Core["core Core"] subgraph WishboneMaster["wb_master_instr WishboneMaster"] WishboneMaster_request["request"] WishboneMaster_result["result"] WishboneMaster_WishboneMaster["WishboneMaster"] subgraph Forwarder["result Forwarder"] Forwarder_write["write"] Forwarder_read["read"] end end subgraph WishboneMaster1["wb_master_data WishboneMaster"] WishboneMaster1_WishboneMaster["WishboneMaster"] WishboneMaster1_result["result"] WishboneMaster1_request["request"] subgraph Forwarder1["result Forwarder"] Forwarder1_read["read"] Forwarder1_write["write"] end end subgraph WishboneMasterAdapter["bus_master_instr_adapter WishboneMasterAdapter"] WishboneMasterAdapter_request_read["request_read"] WishboneMasterAdapter_get_read_response["get_read_response"] subgraph Serializer["bus_serializer Serializer"] Serializer_serialize_out0["serialize_out0"] Serializer_serialize_in0["serialize_in0"] subgraph BasicFifo["pending_requests BasicFifo"] BasicFifo_write["write"] BasicFifo_read["read"] end end end subgraph WishboneMasterAdapter1["bus_master_data_adapter WishboneMasterAdapter"] WishboneMasterAdapter1_request_write["request_write"] WishboneMasterAdapter1_get_read_response["get_read_response"] WishboneMasterAdapter1_request_read["request_read"] WishboneMasterAdapter1_get_write_response["get_write_response"] subgraph Serializer1["bus_serializer Serializer"] Serializer1_serialize_in0["serialize_in0"] Serializer1_serialize_out1["serialize_out1"] Serializer1_serialize_in1["serialize_in1"] Serializer1_serialize_out0["serialize_out0"] subgraph BasicFifo1["pending_requests BasicFifo"] BasicFifo1_read["read"] BasicFifo1_write["write"] end end end subgraph CoreFrontend["frontend CoreFrontend"] CoreFrontend_DiscardBranchVerify["DiscardBranchVerify"] CoreFrontend_target_pred_resp["target_pred_resp"] CoreFrontend_target_pred_req["target_pred_req"] CoreFrontend_stall["stall"] subgraph BasicFifo2["instr_buffer BasicFifo"] BasicFifo2_write["write"] BasicFifo2_read["read"] BasicFifo2_clear["clear"] end subgraph SimpleCommonBusCacheRefiller["icache_refiller SimpleCommonBusCacheRefiller"] SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller["SimpleCommonBusCacheRefiller"] SimpleCommonBusCacheRefiller_start_refill["start_refill"] SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1["SimpleCommonBusCacheRefiller"] SimpleCommonBusCacheRefiller_accept_refill["accept_refill"] subgraph Forwarder2["resp_fwd Forwarder"] Forwarder2_read["read"] Forwarder2_write["write"] end end subgraph ICache["icache ICache"] ICache_ICache["ICache"] ICache_ICache1["ICache"] ICache_flush["flush"] ICache_MemRead["MemRead"] ICache_accept_res["accept_res"] ICache_issue_req["issue_req"] subgraph HwCounter["perf_loads HwCounter"] HwCounter_HwCounter0["HwCounter0"] end subgraph HwCounter1["perf_hits HwCounter"] HwCounter1_HwCounter0["HwCounter0"] end subgraph HwCounter2["perf_misses HwCounter"] HwCounter2_HwCounter0["HwCounter0"] end subgraph HwCounter3["perf_errors HwCounter"] HwCounter3_HwCounter0["HwCounter0"] end subgraph HwCounter4["perf_flushes HwCounter"] HwCounter4_HwCounter0["HwCounter0"] end subgraph FIFOLatencyMeasurer["req_latency FIFOLatencyMeasurer"] FIFOLatencyMeasurer_FIFOLatencyMeasurer0["FIFOLatencyMeasurer0"] FIFOLatencyMeasurer_FIFOLatencyMeasurer01["FIFOLatencyMeasurer0"] subgraph HwExpHistogram["histogram HwExpHistogram"] HwExpHistogram_HwExpHistogram0["HwExpHistogram0"] end subgraph WideFIFOLatencyMeasurer["impl WideFIFOLatencyMeasurer"] WideFIFOLatencyMeasurer_WideFIFOLatencyMeasurer0["WideFIFOLatencyMeasurer0"] WideFIFOLatencyMeasurer_WideFIFOLatencyMeasurer01["WideFIFOLatencyMeasurer0"] subgraph WideFifo["fifo0 WideFifo"] WideFifo_read["read"] WideFifo_write["write"] end end end subgraph ArgumentsToResultsZipper["req_zipper ArgumentsToResultsZipper"] ArgumentsToResultsZipper_write_results["write_results"] ArgumentsToResultsZipper_read["read"] ArgumentsToResultsZipper_write_args["write_args"] subgraph BasicFifo3["fifo BasicFifo"] BasicFifo3_read["read"] BasicFifo3_write["write"] BasicFifo3_peek["peek"] end subgraph Forwarder3["forwarder Forwarder"] Forwarder3_write["write"] Forwarder3_read["read"] end end end subgraph StallController["stall_ctrl StallController"] StallController__resume_from_unsafe["_resume_from_unsafe"] StallController_resume_from_exception["resume_from_exception"] StallController_stall_guard["stall_guard"] StallController__resume_from_unsafe_cond1["_resume_from_unsafe_cond1"] StallController_stall_exception["stall_exception"] StallController__resume_from_unsafe_cond0["_resume_from_unsafe_cond0"] StallController_stall_unsafe["stall_unsafe"] end subgraph FetchUnit["fetch FetchUnit"] FetchUnit_Fetch_Stage2_cond1["Fetch_Stage2_cond1"] FetchUnit_Fetch_Stage2_cond0["Fetch_Stage2_cond0"] FetchUnit_Fetch_Stage1["Fetch_Stage1"] FetchUnit_Fetch_Stage2["Fetch_Stage2"] FetchUnit_cont["cont"] FetchUnit_Fetch_Stage0["Fetch_Stage0"] FetchUnit_flush["flush"] FetchUnit_redirect["redirect"] subgraph TaggedCounter["perf_fetch_utilization TaggedCounter"] TaggedCounter_TaggedCounter0["TaggedCounter0"] end subgraph HwCounter5["perf_fetch_redirects HwCounter"] HwCounter5_HwCounter0["HwCounter0"] end subgraph WideFifo1["serializer WideFifo"] WideFifo1_read["read"] WideFifo1_write["write"] WideFifo1_clear["clear"] end subgraph BasicFifo4["cache_requests BasicFifo"] BasicFifo4_read["read"] BasicFifo4_write["write"] end subgraph Semaphore["req_counter Semaphore"] Semaphore_acquire["acquire"] Semaphore_release["release"] end subgraph Pipe["s1_s2_pipe Pipe"] Pipe_read["read"] Pipe_write["write"] end subgraph Predecoder["predecoder_0 Predecoder"] Predecoder_predecode["predecode"] end subgraph PredictionChecker["prediction_checker PredictionChecker"] PredictionChecker_check["check"] subgraph TaggedCounter1["perf_preceding_redirection TaggedCounter"] TaggedCounter1_TaggedCounter0["TaggedCounter0"] end subgraph TaggedCounter2["perf_mispredicted_cfi_type TaggedCounter"] TaggedCounter2_TaggedCounter0["TaggedCounter0"] end subgraph TaggedCounter3["perf_mispredicted_cfi_target TaggedCounter"] TaggedCounter3_TaggedCounter0["TaggedCounter0"] end end end subgraph Pipe1["output_pipe Pipe"] Pipe1_clear["clear"] Pipe1_write["write"] Pipe1_read["read"] end subgraph Connect["decode_buff Connect"] Connect_write["write"] Connect_read["read"] end subgraph RollbackTagger["rollback_tagger RollbackTagger"] RollbackTagger_RollbackTagger["RollbackTagger"] end subgraph DecodeStage["decode DecodeStage"] DecodeStage_DecodeStage["DecodeStage"] subgraph HwCounter6["perf_illegal_instr HwCounter"] HwCounter6_HwCounter0["HwCounter0"] end end end subgraph PriorityEncoderAllocator["rf_allocator PriorityEncoderAllocator"] PriorityEncoderAllocator_alloc0["alloc0"] PriorityEncoderAllocator_free0["free0"] end subgraph CheckpointRAT["CRAT CheckpointRAT"] CheckpointRAT_free_tag["free_tag"] CheckpointRAT_get_active_tags["get_active_tags"] CheckpointRAT_tag_cond1["tag_cond1"] CheckpointRAT_CheckpointRAT["CheckpointRAT"] CheckpointRAT_CheckpointRAT1["CheckpointRAT"] CheckpointRAT_rename["rename"] CheckpointRAT_allocate_checkpoint["allocate_checkpoint"] CheckpointRAT_tag_cond0["tag_cond0"] CheckpointRAT_allocate_tag["allocate_tag"] CheckpointRAT_rename_cond0["rename_cond0"] CheckpointRAT_CheckpointRAT2["CheckpointRAT"] CheckpointRAT_CheckpointRAT3["CheckpointRAT"] CheckpointRAT_rename_cond1["rename_cond1"] CheckpointRAT_flush_restore["flush_restore"] CheckpointRAT_tag["tag"] CheckpointRAT_CheckpointRAT4["CheckpointRAT"] CheckpointRAT_CheckpointRAT5["CheckpointRAT"] subgraph HwExpHistogram1["perf_tags HwExpHistogram"] HwExpHistogram1_HwExpHistogram0["HwExpHistogram0"] end subgraph HwExpHistogram2["perf_tags_active HwExpHistogram"] HwExpHistogram2_HwExpHistogram0["HwExpHistogram0"] end subgraph HwExpHistogram3["perf_checkpoints HwExpHistogram"] HwExpHistogram3_HwExpHistogram0["HwExpHistogram0"] end subgraph MemoryBank["storage MemoryBank"] MemoryBank_write0["write0"] MemoryBank_read_resp0["read_resp0"] MemoryBank_read_req0["read_req0"] end subgraph MemoryBank1["tag_map MemoryBank"] MemoryBank1_read_resp0["read_resp0"] MemoryBank1_write0["write0"] end subgraph Pipe2["create_checkpoint_pipe Pipe"] Pipe2_read["read"] Pipe2_write["write"] end end subgraph RRAT["RRAT RRAT"] RRAT_RRAT["RRAT"] RRAT_peek["peek"] RRAT_commit["commit"] subgraph AsyncMemoryBank["entries AsyncMemoryBank"] AsyncMemoryBank_write0["write0"] AsyncMemoryBank_read0["read0"] end end subgraph RegisterFile["RF RegisterFile"] RegisterFile_read_resp1["read_resp1"] RegisterFile_read_resp0["read_resp0"] RegisterFile_write0["write0"] RegisterFile_read_req0["read_req0"] RegisterFile_read_req1["read_req1"] RegisterFile_free0["free0"] RegisterFile_perf["perf"] subgraph MemoryBank2["entries MemoryBank"] MemoryBank2_write0["write0"] MemoryBank2_read_resp1["read_resp1"] MemoryBank2_read_req0["read_req0"] MemoryBank2_read_req1["read_req1"] MemoryBank2_read_resp0["read_resp0"] end subgraph TaggedLatencyMeasurer["perf_rf_valid_time TaggedLatencyMeasurer"] TaggedLatencyMeasurer_TaggedLatencyMeasurer0["TaggedLatencyMeasurer0"] TaggedLatencyMeasurer_TaggedLatencyMeasurer01["TaggedLatencyMeasurer0"] subgraph HwExpHistogram4["histogram HwExpHistogram"] HwExpHistogram4_HwExpHistogram0["HwExpHistogram0"] end subgraph AsyncMemoryBank1["slots AsyncMemoryBank"] AsyncMemoryBank1_read0["read0"] AsyncMemoryBank1_write0["write0"] end end subgraph HwExpHistogram5["perf_num_valid HwExpHistogram"] HwExpHistogram5_HwExpHistogram0["HwExpHistogram0"] end end subgraph ReorderBuffer["ROB ReorderBuffer"] ReorderBuffer_ReorderBuffer["ReorderBuffer"] ReorderBuffer_perf["perf"] ReorderBuffer_retire["retire"] ReorderBuffer_put["put"] ReorderBuffer_mark_done0["mark_done0"] ReorderBuffer_peek["peek"] ReorderBuffer_get_indices["get_indices"] subgraph WideFifo2["data WideFifo"] WideFifo2_write["write"] WideFifo2_read["read"] WideFifo2_peek["peek"] end subgraph WideFIFOLatencyMeasurer1["perf_rob_wait_time WideFIFOLatencyMeasurer"] WideFIFOLatencyMeasurer1_WideFIFOLatencyMeasurer0["WideFIFOLatencyMeasurer0"] WideFIFOLatencyMeasurer1_WideFIFOLatencyMeasurer01["WideFIFOLatencyMeasurer0"] subgraph HwExpHistogram6["histogram HwExpHistogram"] HwExpHistogram6_HwExpHistogram0["HwExpHistogram0"] end subgraph WideFifo3["fifo0 WideFifo"] WideFifo3_write["write"] WideFifo3_read["read"] end end subgraph HwExpHistogram7["perf_rob_size HwExpHistogram"] HwExpHistogram7_HwExpHistogram0["HwExpHistogram0"] end end subgraph Retirement["retirement Retirement"] Retirement_Retirement["Retirement"] Retirement_precommit["precommit"] Retirement_Retirement_cond0["Retirement_cond0"] Retirement_core_state["core_state"] Retirement_Retirement1["Retirement"] Retirement_Retirement_cond1["Retirement_cond1"] Retirement_Retirement2["Retirement"] Retirement_Retirement3["Retirement"] subgraph DoubleCounterCSR["instret_csr DoubleCounterCSR"] DoubleCounterCSR_increment["increment"] subgraph CSRRegister["register_low CSRRegister"] CSRRegister_write["write"] CSRRegister__internal_fu_read["_internal_fu_read"] CSRRegister_read["read"] subgraph MethodMap1["fu_read_map MethodMap"] MethodMap1_method["method"] end end subgraph CSRRegister1["register_high CSRRegister"] CSRRegister1_read["read"] CSRRegister1_write["write"] CSRRegister1__internal_fu_read["_internal_fu_read"] subgraph MethodMap3["fu_read_map MethodMap"] MethodMap3_method["method"] end end end subgraph HwCounter7["perf_instr_ret HwCounter"] HwCounter7_HwCounter0["HwCounter0"] end subgraph FIFOLatencyMeasurer1["perf_trap_latency FIFOLatencyMeasurer"] FIFOLatencyMeasurer1_FIFOLatencyMeasurer0["FIFOLatencyMeasurer0"] FIFOLatencyMeasurer1_FIFOLatencyMeasurer01["FIFOLatencyMeasurer0"] subgraph HwExpHistogram8["histogram HwExpHistogram"] HwExpHistogram8_HwExpHistogram0["HwExpHistogram0"] end subgraph WideFIFOLatencyMeasurer2["impl WideFIFOLatencyMeasurer"] WideFIFOLatencyMeasurer2_WideFIFOLatencyMeasurer0["WideFIFOLatencyMeasurer0"] WideFIFOLatencyMeasurer2_WideFIFOLatencyMeasurer01["WideFIFOLatencyMeasurer0"] subgraph WideFifo4["fifo0 WideFifo"] WideFifo4_write["write"] WideFifo4_read["read"] end end end end subgraph ExceptionInformationRegister["exception_information_register ExceptionInformationRegister"] ExceptionInformationRegister_report["report"] ExceptionInformationRegister_get["get"] ExceptionInformationRegister_clear["clear"] end subgraph FuncBlocksUnifier["func_blocks_unifier FuncBlocksUnifier"] subgraph RSFuncBlock["rs_block_0 RSFuncBlock"] subgraph RS["rs RS"] RS_perf["perf"] RS_RS["RS"] RS_RS1["RS"] RS_RS2["RS"] RS_take["take"] RS_RS3["RS"] RS_RS4["RS"] RS_RS5["RS"] RS_update0["update0"] RS_select["select"] RS_insert["insert"] subgraph TaggedLatencyMeasurer1["perf_rs_wait_time TaggedLatencyMeasurer"] TaggedLatencyMeasurer1_TaggedLatencyMeasurer0["TaggedLatencyMeasurer0"] TaggedLatencyMeasurer1_TaggedLatencyMeasurer01["TaggedLatencyMeasurer0"] subgraph HwExpHistogram9["histogram HwExpHistogram"] HwExpHistogram9_HwExpHistogram0["HwExpHistogram0"] end subgraph AsyncMemoryBank2["slots AsyncMemoryBank"] AsyncMemoryBank2_write0["write0"] AsyncMemoryBank2_read0["read0"] end end subgraph HwExpHistogram10["perf_num_full HwExpHistogram"] HwExpHistogram10_HwExpHistogram0["HwExpHistogram0"] end subgraph PreservedOrderAllocator["allocator PreservedOrderAllocator"] PreservedOrderAllocator_alloc["alloc"] PreservedOrderAllocator_free_idx["free_idx"] PreservedOrderAllocator_order["order"] end end subgraph AluFuncUnit["func_unit_0 AluFuncUnit"] AluFuncUnit_issue["issue"] subgraph TaggedCounter4["perf_instr TaggedCounter"] TaggedCounter4_TaggedCounter0["TaggedCounter0"] end end subgraph WakeupSelect["wakeup_select_0 WakeupSelect"] WakeupSelect_WakeupSelect["WakeupSelect"] end subgraph FIFO["connector_0 FIFO"] FIFO_read["read"] FIFO_write["write"] end subgraph ShiftFuncUnit["func_unit_1 ShiftFuncUnit"] ShiftFuncUnit_issue["issue"] end subgraph WakeupSelect1["wakeup_select_1 WakeupSelect"] WakeupSelect1_WakeupSelect["WakeupSelect"] end subgraph FIFO1["connector_1 FIFO"] FIFO1_write["write"] FIFO1_read["read"] end subgraph JumpBranchFuncUnit["func_unit_2 JumpBranchFuncUnit"] JumpBranchFuncUnit_issue["issue"] JumpBranchFuncUnit_JumpBranchFuncUnit["JumpBranchFuncUnit"] subgraph FIFO2["fifo_branch_resolved FIFO"] FIFO2_read["read"] FIFO2_write["write"] end subgraph TaggedCounter5["perf_instr TaggedCounter"] TaggedCounter5_TaggedCounter0["TaggedCounter0"] end subgraph HwCounter8["perf_misaligned HwCounter"] HwCounter8_HwCounter0["HwCounter0"] end subgraph HwCounter9["perf_mispredictions HwCounter"] HwCounter9_HwCounter0["HwCounter0"] end subgraph BasicFifo5["instr_fifo BasicFifo"] BasicFifo5_read["read"] BasicFifo5_write["write"] end subgraph BasicFifo6["None BasicFifo"] BasicFifo6_clear["clear"] BasicFifo6_write["write"] BasicFifo6_read["read"] end subgraph ConnectTrans["None ConnectTrans"] ConnectTrans_ConnectTrans["ConnectTrans"] end end subgraph WakeupSelect2["wakeup_select_2 WakeupSelect"] WakeupSelect2_WakeupSelect["WakeupSelect"] end subgraph Connect1["connector_2 Connect"] Connect1_read["read"] Connect1_write["write"] end subgraph ExceptionFuncUnit["func_unit_3 ExceptionFuncUnit"] ExceptionFuncUnit_issue["issue"] subgraph BasicFifo7["None BasicFifo"] BasicFifo7_clear["clear"] BasicFifo7_read["read"] BasicFifo7_write["write"] end subgraph ConnectTrans1["None ConnectTrans"] ConnectTrans1_ConnectTrans["ConnectTrans"] end end subgraph WakeupSelect3["wakeup_select_3 WakeupSelect"] WakeupSelect3_WakeupSelect["WakeupSelect"] end subgraph FIFO3["connector_3 FIFO"] FIFO3_write["write"] FIFO3_read["read"] end subgraph PrivilegedFuncUnit["func_unit_4 PrivilegedFuncUnit"] PrivilegedFuncUnit_PrivilegedFuncUnit_cond2["PrivilegedFuncUnit_cond2"] PrivilegedFuncUnit_PrivilegedFuncUnit["PrivilegedFuncUnit"] PrivilegedFuncUnit_PrivilegedFuncUnit1["PrivilegedFuncUnit"] PrivilegedFuncUnit_PrivilegedFuncUnit_cond1["PrivilegedFuncUnit_cond1"] PrivilegedFuncUnit_issue["issue"] PrivilegedFuncUnit_PrivilegedFuncUnit_cond3["PrivilegedFuncUnit_cond3"] PrivilegedFuncUnit_PrivilegedFuncUnit_cond0["PrivilegedFuncUnit_cond0"] subgraph TaggedCounter6["perf_instr TaggedCounter"] TaggedCounter6_TaggedCounter0["TaggedCounter0"] end subgraph BasicFifo8["None BasicFifo"] BasicFifo8_write["write"] BasicFifo8_clear["clear"] BasicFifo8_read["read"] end subgraph ConnectTrans2["None ConnectTrans"] ConnectTrans2_ConnectTrans["ConnectTrans"] end end subgraph WakeupSelect4["wakeup_select_4 WakeupSelect"] WakeupSelect4_WakeupSelect["WakeupSelect"] end subgraph Connect2["connector_4 Connect"] Connect2_read["read"] Connect2_write["write"] end subgraph Collector["collector Collector"] subgraph Forwarder4["forwarder Forwarder"] Forwarder4_read["read"] Forwarder4_write["write"] end subgraph CrossbarConnectTrans["connect CrossbarConnectTrans"] subgraph ConnectTrans3["connect_0_0 ConnectTrans"] ConnectTrans3_ConnectTrans["ConnectTrans"] end subgraph ConnectTrans4["connect_1_0 ConnectTrans"] ConnectTrans4_ConnectTrans["ConnectTrans"] end subgraph ConnectTrans5["connect_2_0 ConnectTrans"] ConnectTrans5_ConnectTrans["ConnectTrans"] end subgraph ConnectTrans6["connect_3_0 ConnectTrans"] ConnectTrans6_ConnectTrans["ConnectTrans"] end subgraph ConnectTrans7["connect_4_0 ConnectTrans"] ConnectTrans7_ConnectTrans["ConnectTrans"] end end end end subgraph RSFuncBlock1["rs_block_1 RSFuncBlock"] subgraph RS1["rs RS"] RS1_take["take"] RS1_select["select"] RS1_insert["insert"] RS1_perf["perf"] RS1_RS["RS"] RS1_update0["update0"] RS1_RS1["RS"] RS1_RS2["RS"] subgraph TaggedLatencyMeasurer2["perf_rs_wait_time TaggedLatencyMeasurer"] TaggedLatencyMeasurer2_TaggedLatencyMeasurer0["TaggedLatencyMeasurer0"] TaggedLatencyMeasurer2_TaggedLatencyMeasurer01["TaggedLatencyMeasurer0"] subgraph HwExpHistogram11["histogram HwExpHistogram"] HwExpHistogram11_HwExpHistogram0["HwExpHistogram0"] end subgraph AsyncMemoryBank3["slots AsyncMemoryBank"] AsyncMemoryBank3_read0["read0"] AsyncMemoryBank3_write0["write0"] end end subgraph HwExpHistogram12["perf_num_full HwExpHistogram"] HwExpHistogram12_HwExpHistogram0["HwExpHistogram0"] end subgraph PreservedOrderAllocator1["allocator PreservedOrderAllocator"] PreservedOrderAllocator1_free_idx["free_idx"] PreservedOrderAllocator1_order["order"] PreservedOrderAllocator1_alloc["alloc"] end end subgraph MulUnit["func_unit_0 MulUnit"] MulUnit_issue["issue"] MulUnit_MulUnit["MulUnit"] subgraph FIFO4["params_fifo FIFO"] FIFO4_read["read"] FIFO4_write["write"] end subgraph SequentialUnsignedMul["multiplier SequentialUnsignedMul"] SequentialUnsignedMul_issue["issue"] SequentialUnsignedMul_accept["accept"] subgraph DSPMulUnit["dsp DSPMulUnit"] DSPMulUnit_compute["compute"] end subgraph RecursiveWithSingleDSPMul["multiplier RecursiveWithSingleDSPMul"] RecursiveWithSingleDSPMul_RecursiveWithSingleDSPMul["RecursiveWithSingleDSPMul"] end end end subgraph WakeupSelect5["wakeup_select_0 WakeupSelect"] WakeupSelect5_WakeupSelect["WakeupSelect"] end subgraph Connect3["connector_0 Connect"] Connect3_write["write"] Connect3_read["read"] end subgraph DivUnit["func_unit_1 DivUnit"] DivUnit_issue["issue"] DivUnit_DivUnit["DivUnit"] subgraph FIFO5["params_fifo FIFO"] FIFO5_write["write"] FIFO5_read["read"] end subgraph LongDivider["divider LongDivider"] LongDivider_issue["issue"] LongDivider_accept["accept"] end end subgraph WakeupSelect6["wakeup_select_1 WakeupSelect"] WakeupSelect6_WakeupSelect["WakeupSelect"] end subgraph Connect4["connector_1 Connect"] Connect4_write["write"] Connect4_read["read"] end subgraph Collector1["collector Collector"] subgraph Forwarder5["forwarder Forwarder"] Forwarder5_write["write"] Forwarder5_read["read"] end subgraph CrossbarConnectTrans1["connect CrossbarConnectTrans"] subgraph ConnectTrans8["connect_0_0 ConnectTrans"] ConnectTrans8_ConnectTrans["ConnectTrans"] end subgraph ConnectTrans9["connect_1_0 ConnectTrans"] ConnectTrans9_ConnectTrans["ConnectTrans"] end end end end subgraph RSFuncBlock2["rs_block_2 RSFuncBlock"] subgraph FifoRS["rs FifoRS"] FifoRS_update0["update0"] FifoRS_free_idx["free_idx"] FifoRS_alloc["alloc"] FifoRS_perf["perf"] FifoRS_take["take"] FifoRS_insert["insert"] FifoRS_order["order"] FifoRS_select["select"] FifoRS_FifoRS["FifoRS"] FifoRS_FifoRS1["FifoRS"] subgraph TaggedLatencyMeasurer3["perf_rs_wait_time TaggedLatencyMeasurer"] TaggedLatencyMeasurer3_TaggedLatencyMeasurer0["TaggedLatencyMeasurer0"] TaggedLatencyMeasurer3_TaggedLatencyMeasurer01["TaggedLatencyMeasurer0"] subgraph HwExpHistogram13["histogram HwExpHistogram"] HwExpHistogram13_HwExpHistogram0["HwExpHistogram0"] end subgraph AsyncMemoryBank4["slots AsyncMemoryBank"] AsyncMemoryBank4_read0["read0"] AsyncMemoryBank4_write0["write0"] end end subgraph HwExpHistogram14["perf_num_full HwExpHistogram"] HwExpHistogram14_HwExpHistogram0["HwExpHistogram0"] end end subgraph LSUDummy["func_unit_0 LSUDummy"] LSUDummy_LSUDummy["LSUDummy"] LSUDummy_LSUDummy1["LSUDummy"] LSUDummy_LSUDummy2["LSUDummy"] LSUDummy_LSUDummy_cond0["LSUDummy_cond0"] LSUDummy_LSUDummy3["LSUDummy"] LSUDummy_LSUDummy4["LSUDummy"] LSUDummy_issue["issue"] LSUDummy_LSUDummy_cond1["LSUDummy_cond1"] subgraph LSURequester["requester LSURequester"] LSURequester_issue["issue"] LSURequester_issue_cond1["issue_cond1"] LSURequester_accept["accept"] LSURequester_accept_cond0["accept_cond0"] LSURequester_accept_cond1["accept_cond1"] LSURequester_issue_cond0["issue_cond0"] LSURequester_issue_cond2["issue_cond2"] subgraph BasicFifo9["args_fifo BasicFifo"] BasicFifo9_write["write"] BasicFifo9_read["read"] end end subgraph Forwarder6["requests Forwarder"] Forwarder6_read["read"] Forwarder6_write["write"] end subgraph FIFO6["results_noop FIFO"] FIFO6_write["write"] FIFO6_read["read"] end subgraph FIFO7["issued FIFO"] FIFO7_write["write"] FIFO7_read["read"] end subgraph FIFO8["issued_noop FIFO"] FIFO8_read["read"] FIFO8_write["write"] end subgraph BasicFifo10["None BasicFifo"] BasicFifo10_read["read"] BasicFifo10_write["write"] BasicFifo10_clear["clear"] end subgraph ConnectTrans10["None ConnectTrans"] ConnectTrans10_ConnectTrans["ConnectTrans"] end end subgraph WakeupSelect7["wakeup_select_0 WakeupSelect"] WakeupSelect7_WakeupSelect["WakeupSelect"] end subgraph Connect5["connector_0 Connect"] Connect5_write["write"] Connect5_read["read"] end subgraph Collector2["collector Collector"] subgraph Forwarder7["forwarder Forwarder"] Forwarder7_read["read"] Forwarder7_write["write"] end subgraph CrossbarConnectTrans2["connect CrossbarConnectTrans"] subgraph ConnectTrans11["connect_0_0 ConnectTrans"] ConnectTrans11_ConnectTrans["ConnectTrans"] end end end end subgraph CSRUnit["rs_block_3 CSRUnit"] CSRUnit_get_result["get_result"] CSRUnit_CSRUnit["CSRUnit"] CSRUnit_update0["update0"] CSRUnit_select["select"] CSRUnit_insert["insert"] subgraph BasicFifo11["None BasicFifo"] BasicFifo11_write["write"] BasicFifo11_read["read"] BasicFifo11_clear["clear"] end subgraph ConnectTrans12["None ConnectTrans"] ConnectTrans12_ConnectTrans["ConnectTrans"] end end subgraph MethodProduct["None MethodProduct"] MethodProduct_method["method"] end end subgraph CSRInstances["csr_instances CSRInstances"] subgraph MachineModeCSRRegisters["m_mode MachineModeCSRRegisters"] MachineModeCSRRegisters_MachineModeCSRRegisters["MachineModeCSRRegisters"] subgraph CSRRegister2["mvendorid CSRRegister"] CSRRegister2__internal_fu_read["_internal_fu_read"] subgraph MethodMap5["fu_read_map MethodMap"] MethodMap5_method["method"] end end subgraph CSRRegister3["marchid CSRRegister"] CSRRegister3__internal_fu_read["_internal_fu_read"] subgraph MethodMap7["fu_read_map MethodMap"] MethodMap7_method["method"] end end subgraph CSRRegister4["mimpid CSRRegister"] CSRRegister4__internal_fu_read["_internal_fu_read"] subgraph MethodMap9["fu_read_map MethodMap"] MethodMap9_method["method"] end end subgraph CSRRegister5["mhartid CSRRegister"] CSRRegister5__internal_fu_read["_internal_fu_read"] subgraph MethodMap11["fu_read_map MethodMap"] MethodMap11_method["method"] end end subgraph CSRRegister6["mscratch CSRRegister"] CSRRegister6__internal_fu_read["_internal_fu_read"] CSRRegister6__internal_fu_write["_internal_fu_write"] subgraph MethodMap12["fu_write_map MethodMap"] MethodMap12_method["method"] end subgraph MethodFilter6["fu_write_filter MethodFilter"] MethodFilter6_method["method"] end subgraph MethodMap13["fu_read_map MethodMap"] MethodMap13_method["method"] end end subgraph CSRRegister7["mconfigptr CSRRegister"] CSRRegister7__internal_fu_read["_internal_fu_read"] subgraph MethodMap15["fu_read_map MethodMap"] MethodMap15_method["method"] end end subgraph AliasedCSR["mstatus AliasedCSR"] AliasedCSR__fu_write["_fu_write"] AliasedCSR__fu_read["_fu_read"] end subgraph AliasedCSR1["mstatush AliasedCSR"] AliasedCSR1__fu_write["_fu_write"] AliasedCSR1__fu_read["_fu_read"] end subgraph CSRRegister8["mcause CSRRegister"] CSRRegister8_write["write"] CSRRegister8_read["read"] CSRRegister8__internal_fu_write["_internal_fu_write"] CSRRegister8__internal_fu_read["_internal_fu_read"] subgraph MethodMap16["fu_write_map MethodMap"] MethodMap16_method["method"] end subgraph MethodFilter8["fu_write_filter MethodFilter"] MethodFilter8_method["method"] end subgraph MethodMap17["fu_read_map MethodMap"] MethodMap17_method["method"] end end subgraph AliasedCSR2["mtvec AliasedCSR"] AliasedCSR2__fu_read["_fu_read"] AliasedCSR2__fu_write["_fu_write"] end subgraph CSRRegister9["mepc CSRRegister"] CSRRegister9_read["read"] CSRRegister9__internal_fu_read["_internal_fu_read"] CSRRegister9_write["write"] CSRRegister9__internal_fu_write["_internal_fu_write"] subgraph MethodMap18["fu_write_map MethodMap"] MethodMap18_method["method"] end subgraph MethodFilter9["fu_write_filter MethodFilter"] MethodFilter9_method["method"] end subgraph MethodMap19["fu_read_map MethodMap"] MethodMap19_method["method"] end end subgraph CSRRegister10["mtval CSRRegister"] CSRRegister10__internal_fu_write["_internal_fu_write"] CSRRegister10_write["write"] CSRRegister10__internal_fu_read["_internal_fu_read"] subgraph MethodMap20["fu_write_map MethodMap"] MethodMap20_method["method"] end subgraph MethodFilter10["fu_write_filter MethodFilter"] MethodFilter10_method["method"] end subgraph MethodMap21["fu_read_map MethodMap"] MethodMap21_method["method"] end end subgraph CSRRegister11["misa CSRRegister"] CSRRegister11__internal_fu_write["_internal_fu_write"] CSRRegister11__internal_fu_read["_internal_fu_read"] subgraph MethodMap22["fu_write_map MethodMap"] MethodMap22_method["method"] end subgraph MethodFilter11["fu_write_filter MethodFilter"] MethodFilter11_method["method"] end subgraph MethodMap23["fu_read_map MethodMap"] MethodMap23_method["method"] end end subgraph DoubleCounterCSR1["mcycle DoubleCounterCSR"] DoubleCounterCSR1_increment["increment"] subgraph CSRRegister12["register_low CSRRegister"] CSRRegister12_read["read"] CSRRegister12__internal_fu_write["_internal_fu_write"] CSRRegister12__internal_fu_read["_internal_fu_read"] CSRRegister12_write["write"] subgraph MethodMap24["fu_write_map MethodMap"] MethodMap24_method["method"] end subgraph MethodFilter12["fu_write_filter MethodFilter"] MethodFilter12_method["method"] end subgraph MethodMap25["fu_read_map MethodMap"] MethodMap25_method["method"] end end subgraph CSRRegister13["register_high CSRRegister"] CSRRegister13__internal_fu_read["_internal_fu_read"] CSRRegister13_write["write"] CSRRegister13_read["read"] CSRRegister13__internal_fu_write["_internal_fu_write"] subgraph MethodMap26["fu_write_map MethodMap"] MethodMap26_method["method"] end subgraph MethodFilter13["fu_write_filter MethodFilter"] MethodFilter13_method["method"] end subgraph MethodMap27["fu_read_map MethodMap"] MethodMap27_method["method"] end end end subgraph DoubleCounterCSR2["cycle DoubleCounterCSR"] DoubleCounterCSR2_increment["increment"] subgraph CSRRegister14["register_low CSRRegister"] CSRRegister14__internal_fu_read["_internal_fu_read"] CSRRegister14_read["read"] CSRRegister14_write["write"] subgraph MethodMap29["fu_read_map MethodMap"] MethodMap29_method["method"] end end subgraph CSRRegister15["register_high CSRRegister"] CSRRegister15_read["read"] CSRRegister15__internal_fu_read["_internal_fu_read"] CSRRegister15_write["write"] subgraph MethodMap31["fu_read_map MethodMap"] MethodMap31_method["method"] end end end subgraph CSRRegister16["priv_mode CSRRegister"] CSRRegister16_write["write"] CSRRegister16_read["read"] end subgraph CSRRegister17["mstatus_mie CSRRegister"] CSRRegister17__internal_fu_read["_internal_fu_read"] CSRRegister17_write["write"] CSRRegister17__internal_fu_write["_internal_fu_write"] CSRRegister17_read["read"] subgraph MethodMap34["fu_write_map MethodMap"] MethodMap34_method["method"] end subgraph MethodFilter17["fu_write_filter MethodFilter"] MethodFilter17_method["method"] end subgraph MethodMap35["fu_read_map MethodMap"] MethodMap35_method["method"] end end subgraph CSRRegister18["mstatus_mpie CSRRegister"] CSRRegister18_read["read"] CSRRegister18__internal_fu_write["_internal_fu_write"] CSRRegister18__internal_fu_read["_internal_fu_read"] CSRRegister18_write["write"] subgraph MethodMap36["fu_write_map MethodMap"] MethodMap36_method["method"] end subgraph MethodFilter18["fu_write_filter MethodFilter"] MethodFilter18_method["method"] end subgraph MethodMap37["fu_read_map MethodMap"] MethodMap37_method["method"] end end subgraph CSRRegister19["mstatus_mpp CSRRegister"] CSRRegister19_write["write"] CSRRegister19__internal_fu_read["_internal_fu_read"] CSRRegister19__internal_fu_write["_internal_fu_write"] CSRRegister19_read["read"] subgraph MethodMap38["fu_write_map MethodMap"] MethodMap38_method["method"] end subgraph MethodFilter19["fu_write_filter MethodFilter"] MethodFilter19_method["method"] end subgraph MethodMap39["fu_read_map MethodMap"] MethodMap39_method["method"] end end subgraph CSRRegister20["mstatus_mprv CSRRegister"] CSRRegister20__internal_fu_write["_internal_fu_write"] CSRRegister20_write["write"] CSRRegister20__internal_fu_read["_internal_fu_read"] subgraph MethodMap40["fu_write_map MethodMap"] MethodMap40_method["method"] end subgraph MethodFilter20["fu_write_filter MethodFilter"] MethodFilter20_method["method"] end subgraph MethodMap41["fu_read_map MethodMap"] MethodMap41_method["method"] end end subgraph CSRRegister21["mstatus_tw CSRRegister"] CSRRegister21__internal_fu_write["_internal_fu_write"] CSRRegister21_read["read"] CSRRegister21__internal_fu_read["_internal_fu_read"] subgraph MethodMap42["fu_write_map MethodMap"] MethodMap42_method["method"] end subgraph MethodFilter21["fu_write_filter MethodFilter"] MethodFilter21_method["method"] end subgraph MethodMap43["fu_read_map MethodMap"] MethodMap43_method["method"] end end subgraph CSRRegister22["mtvec_base CSRRegister"] CSRRegister22__internal_fu_read["_internal_fu_read"] CSRRegister22__internal_fu_write["_internal_fu_write"] CSRRegister22_read["read"] subgraph MethodMap44["fu_write_map MethodMap"] MethodMap44_method["method"] end subgraph MethodFilter22["fu_write_filter MethodFilter"] MethodFilter22_method["method"] end subgraph MethodMap45["fu_read_map MethodMap"] MethodMap45_method["method"] end end subgraph CSRRegister23["mtvec_mode CSRRegister"] CSRRegister23_read["read"] CSRRegister23__internal_fu_read["_internal_fu_read"] CSRRegister23__internal_fu_write["_internal_fu_write"] subgraph MethodMap46["fu_write_map MethodMap"] MethodMap46_method["method"] end subgraph MethodFilter23["fu_write_filter MethodFilter"] MethodFilter23_method["method"] end subgraph MethodMap47["fu_read_map MethodMap"] MethodMap47_method["method"] end end end subgraph CSRRegister24["time CSRRegister"] CSRRegister24__internal_fu_read["_internal_fu_read"] subgraph MethodMap49["fu_read_map MethodMap"] MethodMap49_method["method"] end end subgraph CSRRegister25["timeh CSRRegister"] CSRRegister25__internal_fu_read["_internal_fu_read"] subgraph MethodMap51["fu_read_map MethodMap"] MethodMap51_method["method"] end end end subgraph InternalInterruptController["interrupt_controller InternalInterruptController"] InternalInterruptController_entry["entry"] InternalInterruptController_InternalInterruptController["InternalInterruptController"] InternalInterruptController_mret["mret"] InternalInterruptController_interrupt_cause["interrupt_cause"] InternalInterruptController_InternalInterruptController1["InternalInterruptController"] InternalInterruptController_InternalInterruptController2["InternalInterruptController"] subgraph CSRRegister26["mie CSRRegister"] CSRRegister26_read["read"] CSRRegister26__internal_fu_write["_internal_fu_write"] CSRRegister26__internal_fu_read["_internal_fu_read"] subgraph MethodMap52["fu_write_map MethodMap"] MethodMap52_method["method"] end subgraph MethodFilter26["fu_write_filter MethodFilter"] MethodFilter26_method["method"] end subgraph MethodMap53["fu_read_map MethodMap"] MethodMap53_method["method"] end end subgraph CSRRegister27["mip CSRRegister"] CSRRegister27_write["write"] CSRRegister27__internal_fu_read["_internal_fu_read"] CSRRegister27_read["read"] CSRRegister27__internal_fu_write["_internal_fu_write"] CSRRegister27_read_comb["read_comb"] subgraph MethodMap54["fu_write_map MethodMap"] MethodMap54_method["method"] end subgraph MethodFilter27["fu_write_filter MethodFilter"] MethodFilter27_method["method"] end subgraph MethodMap55["fu_read_map MethodMap"] MethodMap55_method["method"] end end end subgraph CoreInstructionCounter["core_counter CoreInstructionCounter"] CoreInstructionCounter_increment["increment"] CoreInstructionCounter_decrement["decrement"] end subgraph MethodProduct1["get_instr MethodProduct"] MethodProduct1_method["method"] end subgraph Scheduler["scheduler Scheduler"] subgraph FIFO9["alloc_rename_buf FIFO"] FIFO9_write["write"] FIFO9_read["read"] end subgraph RegAllocation["reg_alloc RegAllocation"] RegAllocation_RegAllocation["RegAllocation"] end subgraph FIFO10["instr_tag_buf FIFO"] FIFO10_write["write"] FIFO10_read["read"] end subgraph InstructionTagger["instr_tag InstructionTagger"] InstructionTagger_InstructionTagger["InstructionTagger"] end subgraph Connect6["rename_out_buf Connect"] Connect6_write["write"] Connect6_read["read"] end subgraph Renaming["renaming Renaming"] Renaming_Renaming["Renaming"] end subgraph FIFO11["rob_alloc_out_buf FIFO"] FIFO11_read["read"] FIFO11_write["write"] end subgraph ROBAllocation["rob_alloc ROBAllocation"] ROBAllocation_ROBAllocation["ROBAllocation"] end subgraph FIFO12["rs_select_out_buf FIFO"] FIFO12_read["read"] FIFO12_write["write"] end subgraph RSSelection["rs_selector RSSelection"] RSSelection_RSSelection["RSSelection"] RSSelection_RSSelection1["RSSelection"] RSSelection_RSSelection2["RSSelection"] RSSelection_RSSelection3["RSSelection"] end subgraph RSInsertion["rs_insertion RSInsertion"] RSInsertion_RSInsertion["RSInsertion"] end end subgraph ResultAnnouncement["announcement_0 ResultAnnouncement"] ResultAnnouncement_push_result["push_result"] end subgraph CrossbarConnectTrans3["announcement_connector CrossbarConnectTrans"] subgraph ConnectTrans13["connect_0_0 ConnectTrans"] ConnectTrans13_ConnectTrans["ConnectTrans"] end subgraph ConnectTrans14["connect_1_0 ConnectTrans"] ConnectTrans14_ConnectTrans["ConnectTrans"] end subgraph ConnectTrans15["connect_2_0 ConnectTrans"] ConnectTrans15_ConnectTrans["ConnectTrans"] end subgraph ConnectTrans16["connect_3_0 ConnectTrans"] ConnectTrans16_ConnectTrans["ConnectTrans"] end end end end subgraph TransactionManager["transaction_manager TransactionManager"] TransactionManager_issue_cond0_LSUDummy["issue_cond0_LSUDummy"] TransactionManager_accept_cond1_LSUDummy_LSUDummy_cond0_ConnectTrans["accept_cond1_LSUDummy_LSUDummy_cond0_ConnectTrans"] TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3["PrivilegedFuncUnit_PrivilegedFuncUnit_cond3"] TransactionManager_issue_cond1_LSUDummy["issue_cond1_LSUDummy"] TransactionManager_PrivilegedFuncUnit__resume_from_unsafe_cond1_ConnectTrans["PrivilegedFuncUnit__resume_from_unsafe_cond1_ConnectTrans"] TransactionManager_tag_cond0_InstructionTagger["tag_cond0_InstructionTagger"] TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0["Fetch_Stage2_Fetch_Stage2_cond0"] TransactionManager_ConnectTrans__resume_from_unsafe_cond0["ConnectTrans__resume_from_unsafe_cond0"] TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond2["PrivilegedFuncUnit_PrivilegedFuncUnit_cond2"] TransactionManager_rename_cond1_Renaming_ROBAllocation["rename_cond1_Renaming_ROBAllocation"] TransactionManager_LSUDummy_cond0_LSUDummy_ConnectTrans_accept_cond0["LSUDummy_cond0_LSUDummy_ConnectTrans_accept_cond0"] TransactionManager_ConnectTrans_LSUDummy_LSUDummy_cond1["ConnectTrans_LSUDummy_LSUDummy_cond1"] TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1["PrivilegedFuncUnit_PrivilegedFuncUnit_cond1"] TransactionManager_MulUnit_ConnectTrans["MulUnit_ConnectTrans"] TransactionManager_Retirement_Retirement_cond1["Retirement_Retirement_cond1"] TransactionManager_DivUnit_ConnectTrans["DivUnit_ConnectTrans"] TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond0["PrivilegedFuncUnit_PrivilegedFuncUnit_cond0"] TransactionManager_ConnectTrans_JumpBranchFuncUnit["ConnectTrans_JumpBranchFuncUnit"] TransactionManager_tag_cond1_InstructionTagger["tag_cond1_InstructionTagger"] TransactionManager_DecodeStage_RollbackTagger["DecodeStage_RollbackTagger"] TransactionManager_ConnectTrans__resume_from_unsafe_cond1["ConnectTrans__resume_from_unsafe_cond1"] TransactionManager_PrivilegedFuncUnit__resume_from_unsafe_cond0_ConnectTrans["PrivilegedFuncUnit__resume_from_unsafe_cond0_ConnectTrans"] TransactionManager_Fetch_Stage2_Fetch_Stage2_cond1["Fetch_Stage2_Fetch_Stage2_cond1"] TransactionManager_LSUDummy_issue_cond2["LSUDummy_issue_cond2"] TransactionManager_rename_cond0_Renaming_ROBAllocation["rename_cond0_Renaming_ROBAllocation"] TransactionManager_Retirement_Retirement_cond0["Retirement_Retirement_cond0"] end end WishboneMaster_WishboneMaster --> Forwarder_write WishboneMaster1_WishboneMaster --> Forwarder1_write FIFO2_read --> CoreFrontend_DiscardBranchVerify SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> WishboneMasterAdapter_request_read SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> Serializer_serialize_in0 SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> BasicFifo_write SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> WishboneMaster_request WishboneMasterAdapter_get_read_response --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 Serializer_serialize_out0 --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 BasicFifo_read --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 WishboneMaster_result --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 Forwarder_read --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 --> Forwarder2_write ICache_ICache <--> HwCounter4_HwCounter0 BasicFifo3_peek --> ICache_MemRead ICache_MemRead <--> HwCounter1_HwCounter0 ICache_MemRead --> ArgumentsToResultsZipper_write_results ICache_MemRead --> Forwarder3_write ICache_MemRead <--> HwCounter2_HwCounter0 ICache_MemRead --> SimpleCommonBusCacheRefiller_start_refill SimpleCommonBusCacheRefiller_accept_refill --> ICache_ICache1 Forwarder2_read --> ICache_ICache1 ICache_ICache1 <--> HwCounter3_HwCounter0 WideFifo1_read --> FetchUnit_cont FetchUnit_cont --> BasicFifo2_write FetchUnit_Fetch_Stage0 <--> StallController_stall_guard FetchUnit_Fetch_Stage0 <--> Semaphore_acquire FetchUnit_Fetch_Stage0 --> ICache_issue_req FetchUnit_Fetch_Stage0 <--> HwCounter_HwCounter0 FetchUnit_Fetch_Stage0 <--> FIFOLatencyMeasurer_FIFOLatencyMeasurer0 FetchUnit_Fetch_Stage0 --> WideFIFOLatencyMeasurer_WideFIFOLatencyMeasurer0 FetchUnit_Fetch_Stage0 --> WideFifo_write FetchUnit_Fetch_Stage0 --> ArgumentsToResultsZipper_write_args FetchUnit_Fetch_Stage0 --> BasicFifo3_write FetchUnit_Fetch_Stage0 --> BasicFifo4_write BasicFifo4_read --> FetchUnit_Fetch_Stage1 ICache_accept_res --> FetchUnit_Fetch_Stage1 FetchUnit_Fetch_Stage1 <--> FIFOLatencyMeasurer_FIFOLatencyMeasurer01 FetchUnit_Fetch_Stage1 --> WideFIFOLatencyMeasurer_WideFIFOLatencyMeasurer01 WideFifo_read --> FetchUnit_Fetch_Stage1 FetchUnit_Fetch_Stage1 --> HwExpHistogram_HwExpHistogram0 ArgumentsToResultsZipper_read --> FetchUnit_Fetch_Stage1 BasicFifo3_read --> FetchUnit_Fetch_Stage1 Forwarder3_read --> FetchUnit_Fetch_Stage1 FetchUnit_Fetch_Stage1 --> Pipe_write Pipe2_read --> CheckpointRAT_CheckpointRAT CheckpointRAT_CheckpointRAT --> MemoryBank_write0 MemoryBank1_read_resp0 --> CheckpointRAT_CheckpointRAT2 CheckpointRAT_CheckpointRAT2 --> MemoryBank_read_req0 MemoryBank_read_resp0 --> CheckpointRAT_CheckpointRAT5 CheckpointRAT_CheckpointRAT1 --> HwExpHistogram1_HwExpHistogram0 CheckpointRAT_CheckpointRAT4 --> HwExpHistogram2_HwExpHistogram0 CheckpointRAT_CheckpointRAT3 --> HwExpHistogram3_HwExpHistogram0 RRAT_RRAT --> AsyncMemoryBank_write0 TransactionManager_Retirement_Retirement_cond0 --> AsyncMemoryBank_write0 RegisterFile_perf --> HwExpHistogram5_HwExpHistogram0 WideFifo2_peek --> ReorderBuffer_ReorderBuffer ReorderBuffer_perf --> HwExpHistogram7_HwExpHistogram0 MachineModeCSRRegisters_MachineModeCSRRegisters <--> DoubleCounterCSR1_increment CSRRegister12_read --> MachineModeCSRRegisters_MachineModeCSRRegisters MachineModeCSRRegisters_MachineModeCSRRegisters --> CSRRegister12_write CSRRegister13_read --> MachineModeCSRRegisters_MachineModeCSRRegisters MachineModeCSRRegisters_MachineModeCSRRegisters --> CSRRegister13_write MachineModeCSRRegisters_MachineModeCSRRegisters <--> DoubleCounterCSR2_increment CSRRegister14_read --> MachineModeCSRRegisters_MachineModeCSRRegisters MachineModeCSRRegisters_MachineModeCSRRegisters --> CSRRegister14_write CSRRegister15_read --> MachineModeCSRRegisters_MachineModeCSRRegisters MachineModeCSRRegisters_MachineModeCSRRegisters --> CSRRegister15_write CSRRegister17_read --> InternalInterruptController_InternalInterruptController1 CSRRegister17_read --> InternalInterruptController_InternalInterruptController CSRRegister16_read --> InternalInterruptController_InternalInterruptController1 CSRRegister16_read --> InternalInterruptController_InternalInterruptController CSRRegister16_read --> WakeupSelect3_WakeupSelect CSRRegister16_read --> CSRUnit_CSRUnit CSRRegister16_read --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond2 CSRRegister16_read --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 CSRRegister16_read --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond0 CSRRegister16_read --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 CSRRegister26_read --> InternalInterruptController_InternalInterruptController1 CSRRegister27_read --> InternalInterruptController_InternalInterruptController1 CSRRegister27_read_comb --> InternalInterruptController_InternalInterruptController2 InternalInterruptController_InternalInterruptController2 --> CSRRegister27_write InternalInterruptController_InternalInterruptController --> CSRRegister17_write InternalInterruptController_InternalInterruptController --> CSRRegister18_write InternalInterruptController_InternalInterruptController --> CSRRegister19_write InternalInterruptController_InternalInterruptController --> CSRRegister16_write CSRRegister18_read --> InternalInterruptController_InternalInterruptController CSRRegister19_read --> InternalInterruptController_InternalInterruptController InternalInterruptController_InternalInterruptController --> CSRRegister20_write MethodProduct1_method --> RegAllocation_RegAllocation Pipe1_read --> RegAllocation_RegAllocation RegAllocation_RegAllocation <--> CoreInstructionCounter_increment PriorityEncoderAllocator_alloc0 --> RegAllocation_RegAllocation RegAllocation_RegAllocation --> FIFO9_write FIFO11_read --> RSSelection_RSSelection3 FIFO11_read --> RSSelection_RSSelection FIFO11_read --> RSSelection_RSSelection1 FIFO11_read --> RSSelection_RSSelection2 RS_select --> RSSelection_RSSelection3 PreservedOrderAllocator_alloc --> RSSelection_RSSelection3 RSSelection_RSSelection3 --> FIFO12_write RSSelection_RSSelection --> FIFO12_write RSSelection_RSSelection1 --> FIFO12_write RSSelection_RSSelection2 --> FIFO12_write RSSelection_RSSelection3 --> RegisterFile_read_req0 RSSelection_RSSelection --> RegisterFile_read_req0 RSSelection_RSSelection1 --> RegisterFile_read_req0 RSSelection_RSSelection2 --> RegisterFile_read_req0 RSSelection_RSSelection3 --> MemoryBank2_read_req0 RSSelection_RSSelection --> MemoryBank2_read_req0 RSSelection_RSSelection1 --> MemoryBank2_read_req0 RSSelection_RSSelection2 --> MemoryBank2_read_req0 RSSelection_RSSelection3 --> RegisterFile_read_req1 RSSelection_RSSelection --> RegisterFile_read_req1 RSSelection_RSSelection1 --> RegisterFile_read_req1 RSSelection_RSSelection2 --> RegisterFile_read_req1 RSSelection_RSSelection3 --> MemoryBank2_read_req1 RSSelection_RSSelection --> MemoryBank2_read_req1 RSSelection_RSSelection1 --> MemoryBank2_read_req1 RSSelection_RSSelection2 --> MemoryBank2_read_req1 RS1_select --> RSSelection_RSSelection PreservedOrderAllocator1_alloc --> RSSelection_RSSelection FifoRS_select --> RSSelection_RSSelection1 FifoRS_alloc --> RSSelection_RSSelection1 RSSelection_RSSelection2 <--> CSRUnit_select FIFO12_read --> RSInsertion_RSInsertion RegisterFile_read_resp0 --> RSInsertion_RSInsertion MemoryBank2_read_resp0 --> RSInsertion_RSInsertion RegisterFile_read_resp1 --> RSInsertion_RSInsertion MemoryBank2_read_resp1 --> RSInsertion_RSInsertion Retirement_core_state --> RSInsertion_RSInsertion Retirement_core_state --> LSUDummy_LSUDummy CheckpointRAT_get_active_tags --> RSInsertion_RSInsertion RSInsertion_RSInsertion --> RS_insert RSInsertion_RSInsertion --> TaggedLatencyMeasurer1_TaggedLatencyMeasurer0 RSInsertion_RSInsertion --> AsyncMemoryBank2_write0 RSInsertion_RSInsertion --> RS1_insert RSInsertion_RSInsertion --> TaggedLatencyMeasurer2_TaggedLatencyMeasurer0 RSInsertion_RSInsertion --> AsyncMemoryBank3_write0 RSInsertion_RSInsertion --> FifoRS_insert RSInsertion_RSInsertion --> TaggedLatencyMeasurer3_TaggedLatencyMeasurer01 RSInsertion_RSInsertion --> AsyncMemoryBank4_write0 RSInsertion_RSInsertion --> CSRUnit_insert Forwarder4_read --> ConnectTrans13_ConnectTrans ConnectTrans13_ConnectTrans --> ResultAnnouncement_push_result ConnectTrans14_ConnectTrans --> ResultAnnouncement_push_result ConnectTrans15_ConnectTrans --> ResultAnnouncement_push_result TransactionManager_ConnectTrans__resume_from_unsafe_cond0 --> ResultAnnouncement_push_result TransactionManager_ConnectTrans__resume_from_unsafe_cond1 --> ResultAnnouncement_push_result ConnectTrans13_ConnectTrans --> ReorderBuffer_mark_done0 ConnectTrans14_ConnectTrans --> ReorderBuffer_mark_done0 ConnectTrans15_ConnectTrans --> ReorderBuffer_mark_done0 TransactionManager_ConnectTrans__resume_from_unsafe_cond0 --> ReorderBuffer_mark_done0 TransactionManager_ConnectTrans__resume_from_unsafe_cond1 --> ReorderBuffer_mark_done0 ConnectTrans13_ConnectTrans --> RegisterFile_write0 ConnectTrans14_ConnectTrans --> RegisterFile_write0 ConnectTrans15_ConnectTrans --> RegisterFile_write0 TransactionManager_ConnectTrans__resume_from_unsafe_cond0 --> RegisterFile_write0 TransactionManager_ConnectTrans__resume_from_unsafe_cond1 --> RegisterFile_write0 ConnectTrans13_ConnectTrans --> MemoryBank2_write0 ConnectTrans14_ConnectTrans --> MemoryBank2_write0 ConnectTrans15_ConnectTrans --> MemoryBank2_write0 TransactionManager_ConnectTrans__resume_from_unsafe_cond0 --> MemoryBank2_write0 TransactionManager_ConnectTrans__resume_from_unsafe_cond1 --> MemoryBank2_write0 ConnectTrans13_ConnectTrans --> TaggedLatencyMeasurer_TaggedLatencyMeasurer01 ConnectTrans14_ConnectTrans --> TaggedLatencyMeasurer_TaggedLatencyMeasurer01 ConnectTrans15_ConnectTrans --> TaggedLatencyMeasurer_TaggedLatencyMeasurer01 TransactionManager_ConnectTrans__resume_from_unsafe_cond0 --> TaggedLatencyMeasurer_TaggedLatencyMeasurer01 TransactionManager_ConnectTrans__resume_from_unsafe_cond1 --> TaggedLatencyMeasurer_TaggedLatencyMeasurer01 ConnectTrans13_ConnectTrans --> AsyncMemoryBank1_write0 ConnectTrans14_ConnectTrans --> AsyncMemoryBank1_write0 ConnectTrans15_ConnectTrans --> AsyncMemoryBank1_write0 TransactionManager_ConnectTrans__resume_from_unsafe_cond0 --> AsyncMemoryBank1_write0 TransactionManager_ConnectTrans__resume_from_unsafe_cond1 --> AsyncMemoryBank1_write0 ConnectTrans13_ConnectTrans --> MethodProduct_method ConnectTrans14_ConnectTrans --> MethodProduct_method ConnectTrans15_ConnectTrans --> MethodProduct_method TransactionManager_ConnectTrans__resume_from_unsafe_cond0 --> MethodProduct_method TransactionManager_ConnectTrans__resume_from_unsafe_cond1 --> MethodProduct_method ConnectTrans13_ConnectTrans --> RS_update0 ConnectTrans14_ConnectTrans --> RS_update0 ConnectTrans15_ConnectTrans --> RS_update0 TransactionManager_ConnectTrans__resume_from_unsafe_cond0 --> RS_update0 TransactionManager_ConnectTrans__resume_from_unsafe_cond1 --> RS_update0 ConnectTrans13_ConnectTrans --> RS1_update0 ConnectTrans14_ConnectTrans --> RS1_update0 ConnectTrans15_ConnectTrans --> RS1_update0 TransactionManager_ConnectTrans__resume_from_unsafe_cond0 --> RS1_update0 TransactionManager_ConnectTrans__resume_from_unsafe_cond1 --> RS1_update0 ConnectTrans13_ConnectTrans --> FifoRS_update0 ConnectTrans14_ConnectTrans --> FifoRS_update0 ConnectTrans15_ConnectTrans --> FifoRS_update0 TransactionManager_ConnectTrans__resume_from_unsafe_cond0 --> FifoRS_update0 TransactionManager_ConnectTrans__resume_from_unsafe_cond1 --> FifoRS_update0 ConnectTrans13_ConnectTrans --> CSRUnit_update0 ConnectTrans14_ConnectTrans --> CSRUnit_update0 ConnectTrans15_ConnectTrans --> CSRUnit_update0 TransactionManager_ConnectTrans__resume_from_unsafe_cond0 --> CSRUnit_update0 TransactionManager_ConnectTrans__resume_from_unsafe_cond1 --> CSRUnit_update0 Forwarder5_read --> ConnectTrans14_ConnectTrans Forwarder7_read --> ConnectTrans15_ConnectTrans ReorderBuffer_peek --> Retirement_Retirement1 ReorderBuffer_peek --> Retirement_Retirement3 ReorderBuffer_peek --> LSUDummy_LSUDummy4 ReorderBuffer_peek --> CSRUnit_CSRUnit ReorderBuffer_peek --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond2 ReorderBuffer_peek --> TransactionManager_Retirement_Retirement_cond0 ReorderBuffer_peek --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 ReorderBuffer_peek --> TransactionManager_Retirement_Retirement_cond1 ReorderBuffer_peek --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond0 ReorderBuffer_peek --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 ExceptionInformationRegister_get --> Retirement_Retirement1 ExceptionInformationRegister_get --> TransactionManager_Retirement_Retirement_cond0 ExceptionInformationRegister_get --> TransactionManager_Retirement_Retirement_cond1 Retirement_Retirement3 --> ReorderBuffer_retire TransactionManager_Retirement_Retirement_cond0 --> ReorderBuffer_retire TransactionManager_Retirement_Retirement_cond1 --> ReorderBuffer_retire Retirement_Retirement3 --> WideFIFOLatencyMeasurer1_WideFIFOLatencyMeasurer01 TransactionManager_Retirement_Retirement_cond0 --> WideFIFOLatencyMeasurer1_WideFIFOLatencyMeasurer01 TransactionManager_Retirement_Retirement_cond1 --> WideFIFOLatencyMeasurer1_WideFIFOLatencyMeasurer01 WideFifo3_read --> Retirement_Retirement3 WideFifo3_read --> TransactionManager_Retirement_Retirement_cond0 WideFifo3_read --> TransactionManager_Retirement_Retirement_cond1 Retirement_Retirement3 --> HwExpHistogram6_HwExpHistogram0 TransactionManager_Retirement_Retirement_cond0 --> HwExpHistogram6_HwExpHistogram0 TransactionManager_Retirement_Retirement_cond1 --> HwExpHistogram6_HwExpHistogram0 WideFifo2_read --> Retirement_Retirement3 WideFifo2_read --> TransactionManager_Retirement_Retirement_cond0 WideFifo2_read --> TransactionManager_Retirement_Retirement_cond1 Retirement_Retirement3 <--> CheckpointRAT_free_tag TransactionManager_Retirement_Retirement_cond0 <--> CheckpointRAT_free_tag TransactionManager_Retirement_Retirement_cond1 <--> CheckpointRAT_free_tag CoreInstructionCounter_decrement --> Retirement_Retirement3 CoreInstructionCounter_decrement --> TransactionManager_Retirement_Retirement_cond0 CoreInstructionCounter_decrement --> TransactionManager_Retirement_Retirement_cond1 RRAT_peek --> Retirement_Retirement3 RRAT_peek --> TransactionManager_Retirement_Retirement_cond1 AsyncMemoryBank_read0 --> Retirement_Retirement3 AsyncMemoryBank_read0 --> TransactionManager_Retirement_Retirement_cond0 AsyncMemoryBank_read0 --> TransactionManager_Retirement_Retirement_cond1 Retirement_Retirement3 --> RegisterFile_free0 TransactionManager_Retirement_Retirement_cond0 --> RegisterFile_free0 TransactionManager_Retirement_Retirement_cond1 --> RegisterFile_free0 Retirement_Retirement3 --> TaggedLatencyMeasurer_TaggedLatencyMeasurer0 TransactionManager_Retirement_Retirement_cond0 --> TaggedLatencyMeasurer_TaggedLatencyMeasurer0 TransactionManager_Retirement_Retirement_cond1 --> TaggedLatencyMeasurer_TaggedLatencyMeasurer0 AsyncMemoryBank1_read0 --> Retirement_Retirement3 AsyncMemoryBank1_read0 --> TransactionManager_Retirement_Retirement_cond0 AsyncMemoryBank1_read0 --> TransactionManager_Retirement_Retirement_cond1 Retirement_Retirement3 --> HwExpHistogram4_HwExpHistogram0 TransactionManager_Retirement_Retirement_cond0 --> HwExpHistogram4_HwExpHistogram0 TransactionManager_Retirement_Retirement_cond1 --> HwExpHistogram4_HwExpHistogram0 Retirement_Retirement3 --> PriorityEncoderAllocator_free0 TransactionManager_Retirement_Retirement_cond0 --> PriorityEncoderAllocator_free0 TransactionManager_Retirement_Retirement_cond1 --> PriorityEncoderAllocator_free0 Retirement_Retirement3 --> CheckpointRAT_flush_restore TransactionManager_Retirement_Retirement_cond1 --> CheckpointRAT_flush_restore Retirement_Retirement2 <--> FIFOLatencyMeasurer1_FIFOLatencyMeasurer01 Retirement_Retirement2 --> WideFIFOLatencyMeasurer2_WideFIFOLatencyMeasurer0 WideFifo4_read --> Retirement_Retirement2 Retirement_Retirement2 --> HwExpHistogram8_HwExpHistogram0 CSRRegister22_read --> Retirement_Retirement2 CSRRegister23_read --> Retirement_Retirement2 CSRRegister8_read --> Retirement_Retirement2 Retirement_Retirement2 --> StallController_resume_from_exception Retirement_Retirement2 --> FetchUnit_redirect TransactionManager_PrivilegedFuncUnit__resume_from_unsafe_cond0_ConnectTrans --> FetchUnit_redirect TransactionManager_ConnectTrans__resume_from_unsafe_cond0 --> FetchUnit_redirect Retirement_Retirement2 <--> ExceptionInformationRegister_clear Retirement_Retirement2 <--> BasicFifo6_clear Retirement_Retirement2 <--> BasicFifo7_clear Retirement_Retirement2 <--> BasicFifo8_clear Retirement_Retirement2 <--> BasicFifo10_clear Retirement_Retirement2 <--> BasicFifo11_clear PreservedOrderAllocator_order --> RS_RS2 RS_perf --> HwExpHistogram10_HwExpHistogram0 RS_RS --> WakeupSelect_WakeupSelect RS_take --> WakeupSelect_WakeupSelect RS_take --> WakeupSelect1_WakeupSelect RS_take --> WakeupSelect2_WakeupSelect RS_take --> WakeupSelect3_WakeupSelect RS_take --> WakeupSelect4_WakeupSelect WakeupSelect_WakeupSelect --> PreservedOrderAllocator_free_idx WakeupSelect1_WakeupSelect --> PreservedOrderAllocator_free_idx WakeupSelect2_WakeupSelect --> PreservedOrderAllocator_free_idx WakeupSelect3_WakeupSelect --> PreservedOrderAllocator_free_idx WakeupSelect4_WakeupSelect --> PreservedOrderAllocator_free_idx WakeupSelect_WakeupSelect --> TaggedLatencyMeasurer1_TaggedLatencyMeasurer01 WakeupSelect1_WakeupSelect --> TaggedLatencyMeasurer1_TaggedLatencyMeasurer01 WakeupSelect2_WakeupSelect --> TaggedLatencyMeasurer1_TaggedLatencyMeasurer01 WakeupSelect3_WakeupSelect --> TaggedLatencyMeasurer1_TaggedLatencyMeasurer01 WakeupSelect4_WakeupSelect --> TaggedLatencyMeasurer1_TaggedLatencyMeasurer01 AsyncMemoryBank2_read0 --> WakeupSelect_WakeupSelect AsyncMemoryBank2_read0 --> WakeupSelect1_WakeupSelect AsyncMemoryBank2_read0 --> WakeupSelect2_WakeupSelect AsyncMemoryBank2_read0 --> WakeupSelect3_WakeupSelect AsyncMemoryBank2_read0 --> WakeupSelect4_WakeupSelect WakeupSelect_WakeupSelect --> HwExpHistogram9_HwExpHistogram0 WakeupSelect1_WakeupSelect --> HwExpHistogram9_HwExpHistogram0 WakeupSelect2_WakeupSelect --> HwExpHistogram9_HwExpHistogram0 WakeupSelect3_WakeupSelect --> HwExpHistogram9_HwExpHistogram0 WakeupSelect4_WakeupSelect --> HwExpHistogram9_HwExpHistogram0 WakeupSelect_WakeupSelect --> AluFuncUnit_issue WakeupSelect_WakeupSelect --> TaggedCounter4_TaggedCounter0 WakeupSelect_WakeupSelect --> FIFO_write RS_RS3 --> WakeupSelect1_WakeupSelect WakeupSelect1_WakeupSelect --> ShiftFuncUnit_issue WakeupSelect1_WakeupSelect --> FIFO1_write BasicFifo6_read --> ConnectTrans_ConnectTrans ConnectTrans_ConnectTrans --> ExceptionInformationRegister_report ConnectTrans1_ConnectTrans --> ExceptionInformationRegister_report ConnectTrans2_ConnectTrans --> ExceptionInformationRegister_report ConnectTrans10_ConnectTrans --> ExceptionInformationRegister_report ConnectTrans12_ConnectTrans --> ExceptionInformationRegister_report ReorderBuffer_get_indices --> ConnectTrans_ConnectTrans ReorderBuffer_get_indices --> ConnectTrans1_ConnectTrans ReorderBuffer_get_indices --> ConnectTrans2_ConnectTrans ReorderBuffer_get_indices --> ConnectTrans10_ConnectTrans ReorderBuffer_get_indices --> ConnectTrans12_ConnectTrans ConnectTrans_ConnectTrans <--> CoreFrontend_stall ConnectTrans1_ConnectTrans <--> CoreFrontend_stall ConnectTrans2_ConnectTrans <--> CoreFrontend_stall ConnectTrans10_ConnectTrans <--> CoreFrontend_stall ConnectTrans12_ConnectTrans <--> CoreFrontend_stall ConnectTrans_ConnectTrans <--> FetchUnit_flush ConnectTrans1_ConnectTrans <--> FetchUnit_flush ConnectTrans2_ConnectTrans <--> FetchUnit_flush ConnectTrans10_ConnectTrans <--> FetchUnit_flush ConnectTrans12_ConnectTrans <--> FetchUnit_flush ConnectTrans_ConnectTrans <--> WideFifo1_clear ConnectTrans1_ConnectTrans <--> WideFifo1_clear ConnectTrans2_ConnectTrans <--> WideFifo1_clear ConnectTrans10_ConnectTrans <--> WideFifo1_clear ConnectTrans12_ConnectTrans <--> WideFifo1_clear ConnectTrans_ConnectTrans <--> BasicFifo2_clear ConnectTrans1_ConnectTrans <--> BasicFifo2_clear ConnectTrans2_ConnectTrans <--> BasicFifo2_clear ConnectTrans10_ConnectTrans <--> BasicFifo2_clear ConnectTrans12_ConnectTrans <--> BasicFifo2_clear ConnectTrans_ConnectTrans <--> Pipe1_clear ConnectTrans1_ConnectTrans <--> Pipe1_clear ConnectTrans2_ConnectTrans <--> Pipe1_clear ConnectTrans10_ConnectTrans <--> Pipe1_clear ConnectTrans12_ConnectTrans <--> Pipe1_clear ConnectTrans_ConnectTrans <--> StallController_stall_exception ConnectTrans1_ConnectTrans <--> StallController_stall_exception ConnectTrans2_ConnectTrans <--> StallController_stall_exception ConnectTrans10_ConnectTrans <--> StallController_stall_exception ConnectTrans12_ConnectTrans <--> StallController_stall_exception RS_RS4 --> WakeupSelect2_WakeupSelect WakeupSelect2_WakeupSelect --> JumpBranchFuncUnit_issue WakeupSelect2_WakeupSelect <--> CoreFrontend_target_pred_req WakeupSelect2_WakeupSelect --> BasicFifo5_write WakeupSelect2_WakeupSelect --> TaggedCounter5_TaggedCounter0 BasicFifo7_read --> ConnectTrans1_ConnectTrans RS_RS1 --> WakeupSelect3_WakeupSelect WakeupSelect3_WakeupSelect --> ExceptionFuncUnit_issue WakeupSelect3_WakeupSelect --> BasicFifo7_write WakeupSelect3_WakeupSelect --> FIFO3_write BasicFifo8_read --> ConnectTrans2_ConnectTrans RS_RS5 --> WakeupSelect4_WakeupSelect WakeupSelect4_WakeupSelect --> PrivilegedFuncUnit_issue FIFO_read --> ConnectTrans3_ConnectTrans ConnectTrans3_ConnectTrans --> Forwarder4_write ConnectTrans4_ConnectTrans --> Forwarder4_write ConnectTrans6_ConnectTrans --> Forwarder4_write TransactionManager_PrivilegedFuncUnit__resume_from_unsafe_cond1_ConnectTrans --> Forwarder4_write TransactionManager_PrivilegedFuncUnit__resume_from_unsafe_cond0_ConnectTrans --> Forwarder4_write TransactionManager_ConnectTrans_JumpBranchFuncUnit --> Forwarder4_write FIFO1_read --> ConnectTrans4_ConnectTrans FIFO3_read --> ConnectTrans6_ConnectTrans PreservedOrderAllocator1_order --> RS1_RS RS1_perf --> HwExpHistogram12_HwExpHistogram0 RecursiveWithSingleDSPMul_RecursiveWithSingleDSPMul <--> DSPMulUnit_compute RS1_RS2 --> WakeupSelect5_WakeupSelect RS1_take --> WakeupSelect5_WakeupSelect RS1_take --> WakeupSelect6_WakeupSelect WakeupSelect5_WakeupSelect --> PreservedOrderAllocator1_free_idx WakeupSelect6_WakeupSelect --> PreservedOrderAllocator1_free_idx WakeupSelect5_WakeupSelect --> TaggedLatencyMeasurer2_TaggedLatencyMeasurer01 WakeupSelect6_WakeupSelect --> TaggedLatencyMeasurer2_TaggedLatencyMeasurer01 AsyncMemoryBank3_read0 --> WakeupSelect5_WakeupSelect AsyncMemoryBank3_read0 --> WakeupSelect6_WakeupSelect WakeupSelect5_WakeupSelect --> HwExpHistogram11_HwExpHistogram0 WakeupSelect6_WakeupSelect --> HwExpHistogram11_HwExpHistogram0 WakeupSelect5_WakeupSelect --> MulUnit_issue WakeupSelect5_WakeupSelect --> FIFO4_write WakeupSelect5_WakeupSelect --> SequentialUnsignedMul_issue RS1_RS1 --> WakeupSelect6_WakeupSelect WakeupSelect6_WakeupSelect --> DivUnit_issue WakeupSelect6_WakeupSelect --> FIFO5_write WakeupSelect6_WakeupSelect --> LongDivider_issue FifoRS_order --> FifoRS_FifoRS FifoRS_perf --> HwExpHistogram14_HwExpHistogram0 Forwarder6_read --> LSUDummy_LSUDummy1 Forwarder6_read --> TransactionManager_issue_cond1_LSUDummy Forwarder6_read --> TransactionManager_issue_cond0_LSUDummy Forwarder6_read --> TransactionManager_LSUDummy_issue_cond2 LSUDummy_LSUDummy1 --> FIFO6_write WakeupSelect7_WakeupSelect --> FIFO6_write TransactionManager_issue_cond1_LSUDummy --> FIFO6_write TransactionManager_issue_cond0_LSUDummy --> FIFO6_write TransactionManager_LSUDummy_issue_cond2 --> FIFO6_write LSUDummy_LSUDummy1 --> FIFO8_write WakeupSelect7_WakeupSelect --> FIFO8_write TransactionManager_issue_cond1_LSUDummy --> FIFO8_write TransactionManager_issue_cond0_LSUDummy --> FIFO8_write TransactionManager_LSUDummy_issue_cond2 --> FIFO8_write LSUDummy_LSUDummy4 --> Retirement_precommit CSRUnit_CSRUnit --> Retirement_precommit TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond2 --> Retirement_precommit TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 --> Retirement_precommit TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond0 --> Retirement_precommit TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 --> Retirement_precommit BasicFifo10_read --> ConnectTrans10_ConnectTrans FifoRS_FifoRS1 --> WakeupSelect7_WakeupSelect FifoRS_take --> WakeupSelect7_WakeupSelect WakeupSelect7_WakeupSelect --> FifoRS_free_idx WakeupSelect7_WakeupSelect --> TaggedLatencyMeasurer3_TaggedLatencyMeasurer0 AsyncMemoryBank4_read0 --> WakeupSelect7_WakeupSelect WakeupSelect7_WakeupSelect --> HwExpHistogram13_HwExpHistogram0 WakeupSelect7_WakeupSelect --> LSUDummy_issue WakeupSelect7_WakeupSelect --> Forwarder6_write MethodMap1_method --> CSRUnit_CSRUnit CSRRegister__internal_fu_read --> CSRUnit_CSRUnit MethodMap3_method --> CSRUnit_CSRUnit CSRRegister1__internal_fu_read --> CSRUnit_CSRUnit MethodMap5_method --> CSRUnit_CSRUnit CSRRegister2__internal_fu_read --> CSRUnit_CSRUnit MethodMap7_method --> CSRUnit_CSRUnit CSRRegister3__internal_fu_read --> CSRUnit_CSRUnit MethodMap9_method --> CSRUnit_CSRUnit CSRRegister4__internal_fu_read --> CSRUnit_CSRUnit MethodMap11_method --> CSRUnit_CSRUnit CSRRegister5__internal_fu_read --> CSRUnit_CSRUnit MethodMap13_method --> CSRUnit_CSRUnit CSRRegister6__internal_fu_read --> CSRUnit_CSRUnit CSRUnit_CSRUnit --> MethodFilter6_method CSRUnit_CSRUnit --> MethodMap12_method CSRUnit_CSRUnit --> CSRRegister6__internal_fu_write MethodMap15_method --> CSRUnit_CSRUnit CSRRegister7__internal_fu_read --> CSRUnit_CSRUnit AliasedCSR__fu_read --> CSRUnit_CSRUnit MethodMap35_method --> CSRUnit_CSRUnit CSRRegister17__internal_fu_read --> CSRUnit_CSRUnit MethodMap37_method --> CSRUnit_CSRUnit CSRRegister18__internal_fu_read --> CSRUnit_CSRUnit MethodMap39_method --> CSRUnit_CSRUnit CSRRegister19__internal_fu_read --> CSRUnit_CSRUnit MethodMap41_method --> CSRUnit_CSRUnit CSRRegister20__internal_fu_read --> CSRUnit_CSRUnit MethodMap43_method --> CSRUnit_CSRUnit CSRRegister21__internal_fu_read --> CSRUnit_CSRUnit CSRUnit_CSRUnit --> AliasedCSR__fu_write CSRUnit_CSRUnit --> MethodFilter17_method CSRUnit_CSRUnit --> MethodMap34_method CSRUnit_CSRUnit --> CSRRegister17__internal_fu_write CSRUnit_CSRUnit --> MethodFilter18_method CSRUnit_CSRUnit --> MethodMap36_method CSRUnit_CSRUnit --> CSRRegister18__internal_fu_write CSRUnit_CSRUnit --> MethodFilter19_method CSRUnit_CSRUnit --> MethodMap38_method CSRUnit_CSRUnit --> CSRRegister19__internal_fu_write CSRUnit_CSRUnit --> MethodFilter20_method CSRUnit_CSRUnit --> MethodMap40_method CSRUnit_CSRUnit --> CSRRegister20__internal_fu_write CSRUnit_CSRUnit --> MethodFilter21_method CSRUnit_CSRUnit --> MethodMap42_method CSRUnit_CSRUnit --> CSRRegister21__internal_fu_write AliasedCSR1__fu_read --> CSRUnit_CSRUnit CSRUnit_CSRUnit --> AliasedCSR1__fu_write MethodMap17_method --> CSRUnit_CSRUnit CSRRegister8__internal_fu_read --> CSRUnit_CSRUnit CSRUnit_CSRUnit --> MethodFilter8_method CSRUnit_CSRUnit --> MethodMap16_method CSRUnit_CSRUnit --> CSRRegister8__internal_fu_write AliasedCSR2__fu_read --> CSRUnit_CSRUnit MethodMap45_method --> CSRUnit_CSRUnit CSRRegister22__internal_fu_read --> CSRUnit_CSRUnit MethodMap47_method --> CSRUnit_CSRUnit CSRRegister23__internal_fu_read --> CSRUnit_CSRUnit CSRUnit_CSRUnit --> AliasedCSR2__fu_write CSRUnit_CSRUnit --> MethodFilter22_method CSRUnit_CSRUnit --> MethodMap44_method CSRUnit_CSRUnit --> CSRRegister22__internal_fu_write CSRUnit_CSRUnit --> MethodFilter23_method CSRUnit_CSRUnit --> MethodMap46_method CSRUnit_CSRUnit --> CSRRegister23__internal_fu_write MethodMap19_method --> CSRUnit_CSRUnit CSRRegister9__internal_fu_read --> CSRUnit_CSRUnit CSRUnit_CSRUnit --> MethodFilter9_method CSRUnit_CSRUnit --> MethodMap18_method CSRUnit_CSRUnit --> CSRRegister9__internal_fu_write MethodMap21_method --> CSRUnit_CSRUnit CSRRegister10__internal_fu_read --> CSRUnit_CSRUnit CSRUnit_CSRUnit --> MethodFilter10_method CSRUnit_CSRUnit --> MethodMap20_method CSRUnit_CSRUnit --> CSRRegister10__internal_fu_write MethodMap23_method --> CSRUnit_CSRUnit CSRRegister11__internal_fu_read --> CSRUnit_CSRUnit CSRUnit_CSRUnit --> MethodFilter11_method CSRUnit_CSRUnit --> MethodMap22_method CSRUnit_CSRUnit --> CSRRegister11__internal_fu_write MethodMap25_method --> CSRUnit_CSRUnit CSRRegister12__internal_fu_read --> CSRUnit_CSRUnit CSRUnit_CSRUnit --> MethodFilter12_method CSRUnit_CSRUnit --> MethodMap24_method CSRUnit_CSRUnit --> CSRRegister12__internal_fu_write MethodMap27_method --> CSRUnit_CSRUnit CSRRegister13__internal_fu_read --> CSRUnit_CSRUnit CSRUnit_CSRUnit --> MethodFilter13_method CSRUnit_CSRUnit --> MethodMap26_method CSRUnit_CSRUnit --> CSRRegister13__internal_fu_write MethodMap29_method --> CSRUnit_CSRUnit CSRRegister14__internal_fu_read --> CSRUnit_CSRUnit MethodMap31_method --> CSRUnit_CSRUnit CSRRegister15__internal_fu_read --> CSRUnit_CSRUnit MethodMap49_method --> CSRUnit_CSRUnit CSRRegister24__internal_fu_read --> CSRUnit_CSRUnit MethodMap51_method --> CSRUnit_CSRUnit CSRRegister25__internal_fu_read --> CSRUnit_CSRUnit MethodMap53_method --> CSRUnit_CSRUnit CSRRegister26__internal_fu_read --> CSRUnit_CSRUnit CSRUnit_CSRUnit --> MethodFilter26_method CSRUnit_CSRUnit --> MethodMap52_method CSRUnit_CSRUnit --> CSRRegister26__internal_fu_write MethodMap55_method --> CSRUnit_CSRUnit CSRRegister27__internal_fu_read --> CSRUnit_CSRUnit CSRUnit_CSRUnit --> MethodFilter27_method CSRUnit_CSRUnit --> MethodMap54_method CSRUnit_CSRUnit --> CSRRegister27__internal_fu_write BasicFifo11_read --> ConnectTrans12_ConnectTrans TransactionManager_rename_cond1_Renaming_ROBAllocation <--> CheckpointRAT_rename_cond1 TransactionManager_rename_cond1_Renaming_ROBAllocation <--> Renaming_Renaming TransactionManager_rename_cond0_Renaming_ROBAllocation <--> Renaming_Renaming FIFO10_read --> TransactionManager_rename_cond1_Renaming_ROBAllocation FIFO10_read --> TransactionManager_rename_cond0_Renaming_ROBAllocation TransactionManager_rename_cond1_Renaming_ROBAllocation --> CheckpointRAT_rename TransactionManager_rename_cond0_Renaming_ROBAllocation --> CheckpointRAT_rename TransactionManager_rename_cond1_Renaming_ROBAllocation --> Connect6_write TransactionManager_rename_cond0_Renaming_ROBAllocation --> Connect6_write TransactionManager_rename_cond1_Renaming_ROBAllocation <--> ROBAllocation_ROBAllocation TransactionManager_rename_cond0_Renaming_ROBAllocation <--> ROBAllocation_ROBAllocation Connect6_read --> TransactionManager_rename_cond1_Renaming_ROBAllocation Connect6_read --> TransactionManager_rename_cond0_Renaming_ROBAllocation TransactionManager_rename_cond1_Renaming_ROBAllocation --> ReorderBuffer_put TransactionManager_rename_cond0_Renaming_ROBAllocation --> ReorderBuffer_put TransactionManager_rename_cond1_Renaming_ROBAllocation --> WideFIFOLatencyMeasurer1_WideFIFOLatencyMeasurer0 TransactionManager_rename_cond0_Renaming_ROBAllocation --> WideFIFOLatencyMeasurer1_WideFIFOLatencyMeasurer0 TransactionManager_rename_cond1_Renaming_ROBAllocation --> WideFifo3_write TransactionManager_rename_cond0_Renaming_ROBAllocation --> WideFifo3_write TransactionManager_rename_cond1_Renaming_ROBAllocation --> WideFifo2_write TransactionManager_rename_cond0_Renaming_ROBAllocation --> WideFifo2_write TransactionManager_rename_cond1_Renaming_ROBAllocation --> FIFO11_write TransactionManager_rename_cond0_Renaming_ROBAllocation --> FIFO11_write TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond2 <--> PrivilegedFuncUnit_PrivilegedFuncUnit1 TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 <--> PrivilegedFuncUnit_PrivilegedFuncUnit1 TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond0 <--> PrivilegedFuncUnit_PrivilegedFuncUnit1 TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 <--> PrivilegedFuncUnit_PrivilegedFuncUnit1 TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond2 --> TaggedCounter6_TaggedCounter0 TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 --> TaggedCounter6_TaggedCounter0 TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond0 --> TaggedCounter6_TaggedCounter0 TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 --> TaggedCounter6_TaggedCounter0 CSRRegister21_read --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond2 CSRRegister21_read --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 CSRRegister21_read --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond0 CSRRegister21_read --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond2 <--> PrivilegedFuncUnit_PrivilegedFuncUnit_cond2 TransactionManager_DivUnit_ConnectTrans <--> DivUnit_DivUnit LongDivider_accept --> TransactionManager_DivUnit_ConnectTrans FIFO5_read --> TransactionManager_DivUnit_ConnectTrans TransactionManager_DivUnit_ConnectTrans --> Connect4_write TransactionManager_DivUnit_ConnectTrans <--> ConnectTrans9_ConnectTrans Connect4_read --> TransactionManager_DivUnit_ConnectTrans TransactionManager_DivUnit_ConnectTrans --> Forwarder5_write TransactionManager_MulUnit_ConnectTrans --> Forwarder5_write TransactionManager_Retirement_Retirement_cond0 <--> Retirement_Retirement TransactionManager_Retirement_Retirement_cond1 <--> Retirement_Retirement TransactionManager_Retirement_Retirement_cond0 <--> FIFOLatencyMeasurer1_FIFOLatencyMeasurer0 TransactionManager_Retirement_Retirement_cond1 <--> FIFOLatencyMeasurer1_FIFOLatencyMeasurer0 TransactionManager_Retirement_Retirement_cond0 --> WideFIFOLatencyMeasurer2_WideFIFOLatencyMeasurer01 TransactionManager_Retirement_Retirement_cond1 --> WideFIFOLatencyMeasurer2_WideFIFOLatencyMeasurer01 TransactionManager_Retirement_Retirement_cond0 --> WideFifo4_write TransactionManager_Retirement_Retirement_cond1 --> WideFifo4_write InternalInterruptController_interrupt_cause --> TransactionManager_Retirement_Retirement_cond0 InternalInterruptController_interrupt_cause --> TransactionManager_Retirement_Retirement_cond1 TransactionManager_Retirement_Retirement_cond0 --> CSRRegister8_write TransactionManager_Retirement_Retirement_cond1 --> CSRRegister8_write TransactionManager_Retirement_Retirement_cond0 --> CSRRegister9_write TransactionManager_Retirement_Retirement_cond1 --> CSRRegister9_write TransactionManager_Retirement_Retirement_cond0 --> CSRRegister10_write TransactionManager_Retirement_Retirement_cond1 --> CSRRegister10_write TransactionManager_Retirement_Retirement_cond0 <--> InternalInterruptController_entry TransactionManager_Retirement_Retirement_cond1 <--> InternalInterruptController_entry TransactionManager_Retirement_Retirement_cond0 <--> Retirement_Retirement_cond0 TransactionManager_Retirement_Retirement_cond0 --> RRAT_commit TransactionManager_Retirement_Retirement_cond0 <--> DoubleCounterCSR_increment CSRRegister_read --> TransactionManager_Retirement_Retirement_cond0 TransactionManager_Retirement_Retirement_cond0 --> CSRRegister_write CSRRegister1_read --> TransactionManager_Retirement_Retirement_cond0 TransactionManager_Retirement_Retirement_cond0 --> CSRRegister1_write TransactionManager_Retirement_Retirement_cond0 <--> HwCounter7_HwCounter0 TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 <--> PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 <--> ICache_flush TransactionManager_PrivilegedFuncUnit__resume_from_unsafe_cond1_ConnectTrans <--> PrivilegedFuncUnit_PrivilegedFuncUnit TransactionManager_PrivilegedFuncUnit__resume_from_unsafe_cond0_ConnectTrans <--> PrivilegedFuncUnit_PrivilegedFuncUnit CSRRegister9_read --> TransactionManager_PrivilegedFuncUnit__resume_from_unsafe_cond1_ConnectTrans CSRRegister9_read --> TransactionManager_PrivilegedFuncUnit__resume_from_unsafe_cond0_ConnectTrans TransactionManager_PrivilegedFuncUnit__resume_from_unsafe_cond1_ConnectTrans --> BasicFifo8_write TransactionManager_PrivilegedFuncUnit__resume_from_unsafe_cond0_ConnectTrans --> BasicFifo8_write TransactionManager_PrivilegedFuncUnit__resume_from_unsafe_cond1_ConnectTrans --> StallController__resume_from_unsafe TransactionManager_PrivilegedFuncUnit__resume_from_unsafe_cond0_ConnectTrans --> StallController__resume_from_unsafe TransactionManager_ConnectTrans__resume_from_unsafe_cond0 --> StallController__resume_from_unsafe TransactionManager_ConnectTrans__resume_from_unsafe_cond1 --> StallController__resume_from_unsafe TransactionManager_PrivilegedFuncUnit__resume_from_unsafe_cond1_ConnectTrans --> Connect2_write TransactionManager_PrivilegedFuncUnit__resume_from_unsafe_cond0_ConnectTrans --> Connect2_write TransactionManager_PrivilegedFuncUnit__resume_from_unsafe_cond1_ConnectTrans <--> StallController__resume_from_unsafe_cond1 TransactionManager_ConnectTrans__resume_from_unsafe_cond1 <--> StallController__resume_from_unsafe_cond1 TransactionManager_PrivilegedFuncUnit__resume_from_unsafe_cond1_ConnectTrans <--> ConnectTrans7_ConnectTrans TransactionManager_PrivilegedFuncUnit__resume_from_unsafe_cond0_ConnectTrans <--> ConnectTrans7_ConnectTrans Connect2_read --> TransactionManager_PrivilegedFuncUnit__resume_from_unsafe_cond1_ConnectTrans Connect2_read --> TransactionManager_PrivilegedFuncUnit__resume_from_unsafe_cond0_ConnectTrans TransactionManager_Retirement_Retirement_cond1 <--> Retirement_Retirement_cond1 TransactionManager_issue_cond1_LSUDummy <--> LSURequester_issue_cond1 TransactionManager_issue_cond1_LSUDummy --> WishboneMasterAdapter1_request_read TransactionManager_issue_cond1_LSUDummy --> Serializer1_serialize_in0 TransactionManager_issue_cond1_LSUDummy --> BasicFifo1_write TransactionManager_issue_cond0_LSUDummy --> BasicFifo1_write TransactionManager_issue_cond1_LSUDummy --> WishboneMaster1_request TransactionManager_issue_cond0_LSUDummy --> WishboneMaster1_request TransactionManager_issue_cond1_LSUDummy <--> LSUDummy_LSUDummy2 TransactionManager_issue_cond0_LSUDummy <--> LSUDummy_LSUDummy2 TransactionManager_LSUDummy_issue_cond2 <--> LSUDummy_LSUDummy2 TransactionManager_issue_cond1_LSUDummy --> LSURequester_issue TransactionManager_issue_cond0_LSUDummy --> LSURequester_issue TransactionManager_LSUDummy_issue_cond2 --> LSURequester_issue TransactionManager_issue_cond1_LSUDummy --> BasicFifo9_write TransactionManager_issue_cond0_LSUDummy --> BasicFifo9_write TransactionManager_LSUDummy_issue_cond2 --> BasicFifo9_write TransactionManager_issue_cond1_LSUDummy --> FIFO7_write TransactionManager_issue_cond0_LSUDummy --> FIFO7_write TransactionManager_LSUDummy_issue_cond2 --> FIFO7_write TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond0 <--> PrivilegedFuncUnit_PrivilegedFuncUnit_cond0 TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond0 <--> InternalInterruptController_mret TransactionManager_rename_cond0_Renaming_ROBAllocation <--> CheckpointRAT_rename_cond0 CheckpointRAT_allocate_checkpoint --> TransactionManager_rename_cond0_Renaming_ROBAllocation TransactionManager_rename_cond0_Renaming_ROBAllocation --> MemoryBank1_write0 TransactionManager_rename_cond0_Renaming_ROBAllocation --> Pipe2_write TransactionManager_LSUDummy_cond0_LSUDummy_ConnectTrans_accept_cond0 <--> LSUDummy_LSUDummy_cond0 TransactionManager_accept_cond1_LSUDummy_LSUDummy_cond0_ConnectTrans <--> LSUDummy_LSUDummy_cond0 LSURequester_accept --> TransactionManager_LSUDummy_cond0_LSUDummy_ConnectTrans_accept_cond0 LSURequester_accept --> TransactionManager_accept_cond1_LSUDummy_LSUDummy_cond0_ConnectTrans BasicFifo9_read --> TransactionManager_LSUDummy_cond0_LSUDummy_ConnectTrans_accept_cond0 BasicFifo9_read --> TransactionManager_accept_cond1_LSUDummy_LSUDummy_cond0_ConnectTrans FIFO7_read --> TransactionManager_LSUDummy_cond0_LSUDummy_ConnectTrans_accept_cond0 FIFO7_read --> TransactionManager_accept_cond1_LSUDummy_LSUDummy_cond0_ConnectTrans TransactionManager_LSUDummy_cond0_LSUDummy_ConnectTrans_accept_cond0 <--> LSUDummy_LSUDummy3 TransactionManager_ConnectTrans_LSUDummy_LSUDummy_cond1 <--> LSUDummy_LSUDummy3 TransactionManager_accept_cond1_LSUDummy_LSUDummy_cond0_ConnectTrans <--> LSUDummy_LSUDummy3 TransactionManager_LSUDummy_cond0_LSUDummy_ConnectTrans_accept_cond0 --> BasicFifo10_write TransactionManager_ConnectTrans_LSUDummy_LSUDummy_cond1 --> BasicFifo10_write TransactionManager_accept_cond1_LSUDummy_LSUDummy_cond0_ConnectTrans --> BasicFifo10_write TransactionManager_LSUDummy_cond0_LSUDummy_ConnectTrans_accept_cond0 --> Connect5_write TransactionManager_ConnectTrans_LSUDummy_LSUDummy_cond1 --> Connect5_write TransactionManager_accept_cond1_LSUDummy_LSUDummy_cond0_ConnectTrans --> Connect5_write TransactionManager_LSUDummy_cond0_LSUDummy_ConnectTrans_accept_cond0 <--> ConnectTrans11_ConnectTrans TransactionManager_ConnectTrans_LSUDummy_LSUDummy_cond1 <--> ConnectTrans11_ConnectTrans TransactionManager_accept_cond1_LSUDummy_LSUDummy_cond0_ConnectTrans <--> ConnectTrans11_ConnectTrans Connect5_read --> TransactionManager_LSUDummy_cond0_LSUDummy_ConnectTrans_accept_cond0 Connect5_read --> TransactionManager_ConnectTrans_LSUDummy_LSUDummy_cond1 Connect5_read --> TransactionManager_accept_cond1_LSUDummy_LSUDummy_cond0_ConnectTrans TransactionManager_LSUDummy_cond0_LSUDummy_ConnectTrans_accept_cond0 --> Forwarder7_write TransactionManager_ConnectTrans_LSUDummy_LSUDummy_cond1 --> Forwarder7_write TransactionManager_accept_cond1_LSUDummy_LSUDummy_cond0_ConnectTrans --> Forwarder7_write TransactionManager_LSUDummy_cond0_LSUDummy_ConnectTrans_accept_cond0 <--> LSURequester_accept_cond0 WishboneMasterAdapter1_get_write_response --> TransactionManager_LSUDummy_cond0_LSUDummy_ConnectTrans_accept_cond0 Serializer1_serialize_out1 --> TransactionManager_LSUDummy_cond0_LSUDummy_ConnectTrans_accept_cond0 BasicFifo1_read --> TransactionManager_LSUDummy_cond0_LSUDummy_ConnectTrans_accept_cond0 BasicFifo1_read --> TransactionManager_accept_cond1_LSUDummy_LSUDummy_cond0_ConnectTrans WishboneMaster1_result --> TransactionManager_LSUDummy_cond0_LSUDummy_ConnectTrans_accept_cond0 WishboneMaster1_result --> TransactionManager_accept_cond1_LSUDummy_LSUDummy_cond0_ConnectTrans Forwarder1_read --> TransactionManager_LSUDummy_cond0_LSUDummy_ConnectTrans_accept_cond0 Forwarder1_read --> TransactionManager_accept_cond1_LSUDummy_LSUDummy_cond0_ConnectTrans TransactionManager_PrivilegedFuncUnit__resume_from_unsafe_cond0_ConnectTrans <--> StallController__resume_from_unsafe_cond0 TransactionManager_ConnectTrans__resume_from_unsafe_cond0 <--> StallController__resume_from_unsafe_cond0 TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 <--> PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 TransactionManager_ConnectTrans__resume_from_unsafe_cond0 <--> ConnectTrans16_ConnectTrans TransactionManager_ConnectTrans__resume_from_unsafe_cond1 <--> ConnectTrans16_ConnectTrans CSRUnit_get_result --> TransactionManager_ConnectTrans__resume_from_unsafe_cond0 CSRUnit_get_result --> TransactionManager_ConnectTrans__resume_from_unsafe_cond1 TransactionManager_ConnectTrans__resume_from_unsafe_cond0 --> BasicFifo11_write TransactionManager_ConnectTrans__resume_from_unsafe_cond1 --> BasicFifo11_write TransactionManager_tag_cond1_InstructionTagger <--> CheckpointRAT_tag_cond1 TransactionManager_tag_cond1_InstructionTagger <--> InstructionTagger_InstructionTagger TransactionManager_tag_cond0_InstructionTagger <--> InstructionTagger_InstructionTagger FIFO9_read --> TransactionManager_tag_cond1_InstructionTagger FIFO9_read --> TransactionManager_tag_cond0_InstructionTagger TransactionManager_tag_cond1_InstructionTagger <--> CheckpointRAT_tag TransactionManager_tag_cond0_InstructionTagger <--> CheckpointRAT_tag TransactionManager_tag_cond1_InstructionTagger --> FIFO10_write TransactionManager_tag_cond0_InstructionTagger --> FIFO10_write TransactionManager_issue_cond0_LSUDummy <--> LSURequester_issue_cond0 TransactionManager_issue_cond0_LSUDummy --> WishboneMasterAdapter1_request_write TransactionManager_issue_cond0_LSUDummy --> Serializer1_serialize_in1 TransactionManager_ConnectTrans_JumpBranchFuncUnit <--> ConnectTrans5_ConnectTrans Connect1_read --> TransactionManager_ConnectTrans_JumpBranchFuncUnit TransactionManager_ConnectTrans_JumpBranchFuncUnit <--> JumpBranchFuncUnit_JumpBranchFuncUnit BasicFifo5_read --> TransactionManager_ConnectTrans_JumpBranchFuncUnit CoreFrontend_target_pred_resp --> TransactionManager_ConnectTrans_JumpBranchFuncUnit TransactionManager_ConnectTrans_JumpBranchFuncUnit <--> HwCounter9_HwCounter0 TransactionManager_ConnectTrans_JumpBranchFuncUnit <--> HwCounter8_HwCounter0 TransactionManager_ConnectTrans_JumpBranchFuncUnit --> BasicFifo6_write TransactionManager_ConnectTrans_JumpBranchFuncUnit --> FIFO2_write TransactionManager_ConnectTrans_JumpBranchFuncUnit --> Connect1_write TransactionManager_Fetch_Stage2_Fetch_Stage2_cond1 <--> FetchUnit_Fetch_Stage2 TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 <--> FetchUnit_Fetch_Stage2 TransactionManager_Fetch_Stage2_Fetch_Stage2_cond1 <--> Semaphore_release TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 <--> Semaphore_release Pipe_read --> TransactionManager_Fetch_Stage2_Fetch_Stage2_cond1 Pipe_read --> TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 TransactionManager_Fetch_Stage2_Fetch_Stage2_cond1 --> Predecoder_predecode TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 --> Predecoder_predecode TransactionManager_Fetch_Stage2_Fetch_Stage2_cond1 --> PredictionChecker_check TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 --> PredictionChecker_check TransactionManager_Fetch_Stage2_Fetch_Stage2_cond1 --> TaggedCounter1_TaggedCounter0 TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 --> TaggedCounter1_TaggedCounter0 TransactionManager_Fetch_Stage2_Fetch_Stage2_cond1 --> TaggedCounter2_TaggedCounter0 TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 --> TaggedCounter2_TaggedCounter0 TransactionManager_Fetch_Stage2_Fetch_Stage2_cond1 --> TaggedCounter3_TaggedCounter0 TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 --> TaggedCounter3_TaggedCounter0 TransactionManager_Fetch_Stage2_Fetch_Stage2_cond1 <--> FetchUnit_Fetch_Stage2_cond1 TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 <--> FetchUnit_Fetch_Stage2_cond0 TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 <--> StallController_stall_unsafe TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 <--> HwCounter5_HwCounter0 TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 --> TaggedCounter_TaggedCounter0 TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 --> WideFifo1_write TransactionManager_LSUDummy_issue_cond2 <--> LSURequester_issue_cond2 TransactionManager_ConnectTrans_LSUDummy_LSUDummy_cond1 <--> LSUDummy_LSUDummy_cond1 FIFO6_read --> TransactionManager_ConnectTrans_LSUDummy_LSUDummy_cond1 FIFO8_read --> TransactionManager_ConnectTrans_LSUDummy_LSUDummy_cond1 TransactionManager_DecodeStage_RollbackTagger <--> DecodeStage_DecodeStage BasicFifo2_read --> TransactionManager_DecodeStage_RollbackTagger TransactionManager_DecodeStage_RollbackTagger <--> HwCounter6_HwCounter0 TransactionManager_DecodeStage_RollbackTagger --> Connect_write TransactionManager_DecodeStage_RollbackTagger <--> RollbackTagger_RollbackTagger Connect_read --> TransactionManager_DecodeStage_RollbackTagger TransactionManager_DecodeStage_RollbackTagger --> Pipe1_write TransactionManager_accept_cond1_LSUDummy_LSUDummy_cond0_ConnectTrans <--> LSURequester_accept_cond1 WishboneMasterAdapter1_get_read_response --> TransactionManager_accept_cond1_LSUDummy_LSUDummy_cond0_ConnectTrans Serializer1_serialize_out0 --> TransactionManager_accept_cond1_LSUDummy_LSUDummy_cond0_ConnectTrans TransactionManager_tag_cond0_InstructionTagger <--> CheckpointRAT_tag_cond0 CheckpointRAT_allocate_tag --> TransactionManager_tag_cond0_InstructionTagger TransactionManager_MulUnit_ConnectTrans <--> MulUnit_MulUnit SequentialUnsignedMul_accept --> TransactionManager_MulUnit_ConnectTrans FIFO4_read --> TransactionManager_MulUnit_ConnectTrans TransactionManager_MulUnit_ConnectTrans --> Connect3_write TransactionManager_MulUnit_ConnectTrans <--> ConnectTrans8_ConnectTrans Connect3_read --> TransactionManager_MulUnit_ConnectTrans