coreblocks.priv package

Subpackages

• coreblocks.priv.csr package
  • Submodules
  • coreblocks.priv.csr.aliased module
    • AliasedCSR
      • AliasedCSR.__init__()
      • AliasedCSR.add_field()
      • AliasedCSR.add_read_only_field()
  • coreblocks.priv.csr.csr_instances module
    • CSRInstances
      • CSRInstances.__init__()
    • MachineModeCSRRegisters
      • MachineModeCSRRegisters.__init__()
      • MachineModeCSRRegisters.hpm_event_report
    • SupervisorModeCSRRegisters
      • SupervisorModeCSRRegisters.__init__()
    • counteren_access_filter()
    • counteren_writable_mask()
  • coreblocks.priv.csr.csr_register module
    • CSRRegister
      • CSRRegister.__init__()
    • CSRRegisterBase
      • CSRRegisterBase.__init__()
  • coreblocks.priv.csr.double_counter module
    • DoubleCounterCSR
      • DoubleCounterCSR.__init__()
      • DoubleCounterCSR.increment
  • coreblocks.priv.csr.double_shadow module
    • DoubleShadowCSR
      • DoubleShadowCSR.__init__()
  • coreblocks.priv.csr.shadow module
    • ShadowCSR
      • ShadowCSR.__init__()
  • Module contents
• coreblocks.priv.traps package
  • Submodules
  • coreblocks.priv.traps.exception module
    • ExceptionInformationRegister
      • ExceptionInformationRegister.__init__()
      • ExceptionInformationRegister.get
      • ExceptionInformationRegister.report
      • ExceptionInformationRegister.rob_get_indices
  • coreblocks.priv.traps.instr_counter module
    • CoreInstructionCounter
      • CoreInstructionCounter.__init__()
      • CoreInstructionCounter.decrement
      • CoreInstructionCounter.increment
  • coreblocks.priv.traps.interrupt_controller module
    • InternalInterruptController
      • InternalInterruptController.__init__()
      • InternalInterruptController.custom_report
      • InternalInterruptController.internal_report_level
  • Module contents
• coreblocks.priv.vmem package
  • Submodules
  • coreblocks.priv.vmem.iface module
    • TLBBackingDevice
      • TLBBackingDevice.__init__()
      • TLBBackingDevice.accept
      • TLBBackingDevice.request
  • coreblocks.priv.vmem.tlb module
    • FullyAssociativeTLB
      • FullyAssociativeTLB.__init__()
      • FullyAssociativeTLB.get_port()
    • SetAssociativeTLB
      • SetAssociativeTLB.__init__()
      • SetAssociativeTLB.get_port()
  • coreblocks.priv.vmem.translation module
    • AddressTranslator
      • AddressTranslator.__init__()
    • AddressTranslatorMode
      • AddressTranslatorMode.INSTRUCTION
      • AddressTranslatorMode.LSU
  • coreblocks.priv.vmem.walker module
    • PageTableWalker
      • PageTableWalker.__init__()
  • Module contents

Submodules

coreblocks.priv.pmp module

class coreblocks.priv.pmp.DynamicAreaPMPChecker

Bases: Elaboratable

Implementation of physical memory protection checker that checks permissions of an naturally aligned power-of-two physical address range.

__init__(gen_params: GenParams, *, mode: PMPOperationMode, size_classes: list[int]) → None

Parameters:

mode: PMPOperationMode

How privilege level, for which access will be done, is found.

size_classes: list[int]

The log2 of power-of-two for which the checker can do the operations. The size_class signal selects the value from these.

paddr: Value

Memory address, for which PMP checks are requested. Must be aligned to the size class.

result: View

RWX permission bits for the given address based on current PMP configuration and privilege mode. Bits are set to 0 if access is denied. layout: PMPLayout

size_class: Value

The size class for which to check uniformity and attributes. See size_classes in constructor.

uniform: Value

Is the address range fully inside a single PMP entry.

class coreblocks.priv.pmp.PMPChecker

Bases: Elaboratable

Like DynamicAreaPMPChecker, but with constant access size.

__init__(gen_params: GenParams, *, mode: PMPOperationMode, access_size_log: int = 2) → None

Parameters:

mode: PMPOperationMode

How privilege level, for which access will be done, is found.

access_size_log: int

The log2 of power-of-two for which the checker validates operations for.

paddr: Value

Memory address, for which PMP checks are requested.

result: View

RWX permission bits for the given address based on current PMP configuration and privilege mode. Bits are set to 0 if access is denied. layout: PMPLayout

uniform: Value

Is the address range fully inside a single PMP entry.

class coreblocks.priv.pmp.PMPLayout

Bases: StructLayout

__init__()

class coreblocks.priv.pmp.PMPLayoutFull

Bases: StructLayout

__init__()

class coreblocks.priv.pmp.PMPOperationMode

Bases: Enum

choice of the privilege mode of an access

INSTRUCTION_FETCH = 2

access is of the current privilege mode

LSU = 1

access is MPRV-aware - using MPP when MPRV=1, otherwise current privilege mode

MMU = 3

access is always generated by S-mode

Module contents